Browsing by Author "Yang, Fei"
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Item Degradation Assessment and Precursor Identification for SiC MOSFETs under High Temp Cycling(Institute of Electrical and Electronics Engineers Inc., 2019-01-07) Ugur, Enes; Yang, Fei; Pu, Shi; Zhao, S.; Akin, Bilal; 0000-0001-6912-7219 (Akin, B); Ugur, Enes; Yang, Fei; Pu, Shi; Akin, BilalSilicon carbide (SiC) power mosfets are promising alternatives to Si devices in high-voltage, high-frequency, and high-temperature applications. The rapid and widespread deployment of SiC devices raises long-term reliability concerns, particularly for mission and safety critical systems due to limited field data and potential uncertainties. Therefore, it is essential to investigate progressive degradations and parameter shifts in SiC devices to develop system integrated degradation monitoring tools for self-monitoring converters, which can recognize failure precursors at the earliest stage and prevent catastrophic failures. This paper presents a comprehensive long-term reliability analysis of commercially available SiC mosfets under high temperature operation and high temperature swing, degradation related key precursors, and possible causes behind them. For this purpose, discrete SiC devices are power cycled and all datasheet parameters are recorded at certain intervals with the aid of the curve tracer. Variation of electrical parameters throughout the tests is presented in order to assess their correlation with the aging/degradation state of the switch. Among them, gate oxide charge trapping related threshold voltage drift and corresponding on state resistance variation has been observed for all samples. For some samples, bond wire heel cracking is found to be the root cause of sudden on state resistance and body diode voltage increases. The discussions regarding aging precursors are supported by failure analysis obtained through the decapsulation of failed devices. Finally, the findings are evaluated in order to define the suitability of electrical parameters as an aging precursor parameter under the light of practical implementation related issues. ©1972-2012 IEEE.Item Design of a High-Performance DC Power Cycling Test Setup for SiC MOSFETs(Institute of Electrical and Electronics Engineers Inc., 2019-03-17) Yang, Fei; Ugur, Enes; Pu, Shi; Akin, Bilal; 0000-0001-6912-7219 (Akin, B); Yang, Fei; Ugur, Enes; Pu, Shi; Akin, BilalIn this paper, a high-performance DC power cycling setup dedicated for SiC power MOSFETs is presented. Different from the previous DC power cycling setup designs focusing on circuit topology and operation principle, this paper discusses the detailed design considerations to ensure the measurement accuracy and control the voltage spikes within the safe voltage range of the data acquisition (DAQ) equipment. Specifically, the transient behavior of the circuit is analyzed, and a simulation model is built in LTspice to facilitate the design. From the simulation result, it is observed that the gate timing control is critical to limit the measurement spikes. In addition, adding decoupling capacitors helps to attenuate the ringing noise in the voltage measurement. A prototype is built, and the experimental results indicate that a precise measurement can be realized with the proposed DC power cycling setup under various conditions. © 2019 IEEE.Item Impact of Threshold Voltage Instability on Static and Switching Performance of GaN Devices with p-GaN Gate(Institute of Electrical and Electronics Engineers Inc., 2019-03-17) Yang, Fei; Xu, Chi; Akin, Bilal; 0000-0001-6912-7219 (Akin, B); Yang, Fei; Xu, Chi; Akin, BilalThe p-GaN gate technology has been adopted to realize enhancement-mode GaN devices. However, the blocking voltage can cause the threshold voltage to drift in p-GaN devices In this paper, the impact of the threshold voltage instability on the static and switching performance of the p-GaN device is studied. Specifically, a Vₜₕ measurement circuit is first designed which is able to characterize the threshold voltage after applying a minimum high voltage pulse of 2 μs. From the experimental result, an increase of more than 0.7 V in Vₜₕ is observed within several μs after blocking the high voltage. The static characteristics of the same device are compared before and after blocking the high voltage, and a reduced knee point in the output characteristic is observed at a low gate-to-source voltage. Due to the static characteristic variation, the switching performance of the device is also changed after stressed with the high drain-to-source voltage. Specifically, from the double pulse test result at 400 V/25 A with R₉ =20 Ω, more than 20% increase of turn-on loss is recognized after blocking the high voltage for 30 minutes. The turn on loss difference is minimized when the gate resistance value is reduced to 0 Ω. For the turn-off loss, the impact of Vₜₕ's shift is negligible. Detailed analysis is also provided to explain the experimental result. It is concluded that higher gate drive voltage and lower gate resistance helps to minimize the threshold voltage instability's effect on the device's performance. © 2019 IEEE.Item Reliability Evaluation and Condition Monitoring of Wide Bandgap Devices(2020-04-07) Yang, Fei; Akin, BilalThe reliability of power semiconductor devices is important as the device failures can lead to power converter malfunctions or power interruptions, which are not desirable in the industry because of the penalties of the maintenance cost, operation cost, and safety concerns. With low on-resistance and junction capacitance, the Wide Bandgap (WBG) devices are attractive for highefficiency and high-power-density power electronics converters in various industrial applications. However, as a relatively new technology with limited field application data, the long-term reliability of these devices is a concern for some mission-critical applications, e.g., automobile industry, aerospace application, and renewable energy systems. To understand these reliability issues, this dissertation evaluates the commercial SiC MOSFETs and GaN HEMTs in terms of their reliability and robustness. For SiC MOSFETs, a dedicated aging setup is designed, and the parameter shifts of the device over aging are studied. Both the device-related and package issues are focused, and their impacts on the device’s electrical performance are investigated, respectively. Also, targeting at the state-of-health condition monitoring of SiC MOSFETs, the aging’s effect on temperature sensitive electrical parameter (TSEP) based Tj measurement methods are evaluated. Based on the evaluation result, a new online junction temperature measurement approach is proposed and realized in an intelligent gate drive circuit for condition monitoring purposes. In terms of GaN HEMTs, device-related reliability and performance issues are studied. Specifically, the dynamic on-resistance and threshold voltage shift are successfully characterized by the proposed measurement circuits. Then their impacts on the device’s performance are investigated. The evaluation results and condition monitoring methods in this dissertation help to fully understand the physical cause of the reliability issue in WBG devices and guide the application engineers to maximize the device’s performance through proper gate drive circuit design.