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Reducing the Complexity of Fault-Tolerant Behavioral Hardware Accelerators
Continuous technology scaling has allowed to integrate a large number of different hardware components on the same integrated circuit (IC). Thus, these complex ICs are typically called System-on-Chip (SoC). Area, power ...
In-Situ Implementation and Training of Convolutional Neural Network on FPGAs
The main objective of this thesis is to investigate the efficiency of in-situ trainable Convolutional Neural Networks (CNNs) on modern programmable System-on-Chip (SoC) Field Programmable Gate Arrays (FPGAs) composed of ...
Enabling the Generation of Behavioral System-on Chip (SoC)
The thesis aims to enable the generation of complete behavioral heterogenous System-on-Chip (SoC) through two main ideas: First, an automatic bus generator that takes as input the bus characteristics and memory map of all ...