Novel Static Timing Analysis Approach for Customized Design Fabric

Date

2018-05-10

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Abstract

Synopsys' PrimeTime is widely used for static timing analysis and timing signoff solutions nowadays. However, PrimeTime has its two limitation. Firstly, it is unable to work on some customized fabric where the circuit consist not only the standard cells and wires as in conventional circuit. Secondly, PrimeTime reports the timing of the design not as accurate in deep nanotechnology. The error could sometimes be as large as 15% compare to the real case. In this article, we proposed a novel STA approach that combines the HSpice simulation and PrimeTime analysis to provide timing accuracy that is comparable to HSpice. This approach is very flexible that could work on any non-standard customized circuit including SRAM cell or customized circuit that containing pass transistors. The thesis also introduced a customized design circuit named Field Programmable Transistor Array (FPTA) as test case to practically proved the feasibility of the new STA approach. The simulation result shows that the proposed approach could work on nonstandard circuit and provide the accuracy that is extremely close to Spice simulation.

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Keywords

Electric circuit analysis, Electrical engineering—Simulation methods, Transistors

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©2018 The Author. Digital access to this material is made possible by the Eugene McDermott Library. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.

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