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dc.contributor.authorAnurag, A.
dc.contributor.authorAcharya, S.
dc.contributor.authorPrabowo, Y.
dc.contributor.authorGohil, Ghanshyamsinh V.
dc.contributor.authorBhattacharya, S.
dc.date.accessioned2019-06-07T15:00:34Z
dc.date.available2019-06-07T15:00:34Z
dc.date.created2019-06
dc.identifier.issn0885-8993
dc.identifier.urihttps://hdl.handle.net/10735.1/6564
dc.descriptionFull text access from Treasures at UT Dallas is restricted to current UTD affiliates.
dc.description.abstractMedium Voltage (MV) Silicon Carbide (SiC) devices have opened up new areas of applications which were previously dominated by silicon based IGBTs. From the perspective of a power converter design, the development of MV SiC devices eliminates the need for series connected architectures, control of multilevel converter topologies which are necessary for MV applications, and the inherent reliability issues associated with it. However, when SiC devices are used in these applications, they are exposed to a high peak stress (5 kV to 10 kV) and a very high dv/dt (10 kV/ μs to 100 kV/ μs). Using these devices calls for a gate driver with dc-dc isolation stage which has ultra-low coupling capacitance in addition to be able to withstand the high isolation voltage. This paper presents a new MV gate driver design to address these issues while maintaining a minimal footprint for the gate driver. A medium voltage isolation transformer is designed with a low inter-winding capacitance, while maintaining the clearance, creepage, as well as insulation standards. A dc isolation test has been performed to validate the integrity of the insulating material. The key features include low input common mode current, and a short circuit protection scheme specifically designed for 10 kV SiC MOSFETs. The performance of the gate driver is evaluated using double pulse tests and continuous tests. Experimental results validate the advantages of the gate driver and its application for medium voltage SiC devices exhibiting very high dv/dt. The proposed gate driver concept is aimed at providing an efficient and reliable method to drive MV SiC devices.
dc.language.isoen
dc.publisherInstitute of Electrical and Electronics Engineers Inc.
dc.relation.urihttp://dx.doi.org/10.1109/TPEL.2018.2870084
dc.rights©2018 IEEE
dc.subjectSilicon carbide
dc.subjectElectric inverters
dc.subjectPower semiconductors
dc.subjectDC-to-DC converters
dc.titleDesign Considerations and Development of an Innovative Gate Driver for Medium Voltage Power Devices with High dv/dt
dc.type.genrearticle
dc.description.departmentErik Jonsson School of Engineering and Computer Science
dc.identifier.bibliographicCitationAnurag, A., S. Acharya, Y. Prabowo, G. Gohil, et al. 2018. "Design considerations and development of an innovative gate driver for medium voltage power devices with high dv/dt." IEEE Transactions on Power Electronics 34(6): 5256 - 5267, doi:10.1109/TPEL.2018.2870084
dc.source.journalIEEE Transactions on Power Electronics
dc.identifier.volume34
dc.identifier.issue6
dc.contributor.utdAuthorGohil, Ghanshyamsinh V.
dc.contributor.ORCID0000-0001-7875-4759 (Gohil, GV)


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