Novel Logic Synthesis Techniques for Asymmetric Logic Functions Based on Spintronic and Memristive Devices
The development of beyond-CMOS technologies with alternative basis logic functions necessitates the introduction of novel design automation techniques. In particular, recently proposed computing systems based on memristors and bilayer avalanche spin-diodes both provide asymmetric logic functions as basis logic gates - the implication and inverted-input AND, respectively. There has been a considerable amount of work done in the field of logic synthesis using alternative logic sets, especially stateful memristive implication logic. However, most of the previous works rely on the mapping of these alternative logic functions on to standard ones like NAND, NOR, AND, and OR gates respectively. This work points out the possible overheads of such an approach, and the advantages of using asymmetric logic functions to directly implement circuits, which calls for suitable synthesis and optimization techniques, tailored specifically to asymmetric logic functions. Such techniques are rooted in the enablement of Boolean reduction methods without any translation to standard logic operators. This is made possible by the proposed set of Boolean identities and principles, and a modified Karnaugh mapping method that can be directly applied to systems with asymmetric logic functions as the basic logic sets. A comparative study is presented, which highlights the statistical improvements over previously proposed approaches in terms of the total number of devices used to implement a standard function. Finally, a basic algorithm for the automated optimization of asymmetric functions is proposed, providing the groundwork for advanced design automation techniques for emerging device technologies.