Friedman, Joseph S.

 

Joseph Friedman is Assistant Professor of Electrical and Computer Engineering. He also serves as the Director of the NeuroSpinCompute Laboratory. His research objective is to "invent, design, and analyze novel logical and neuromorphic computing paradigms that exploit nanoscale phenomena to achieve greater capabilities than conventional CMOS architectures." His research projects have included:

  • All-Carbon Spin Logic
  • Magnetic Domain Wall Neuron
  • Complementary Magnetic Tunnel Junction Logic (CMAT)
  • Spin-Diode Logic
  • Four-Gate FET Threshold Logic
  • Stochastic Bayesian Inference
  • Spin-Transfer Torque Logic with Ferromagnetic Nanowires
  • Efficient Carbon Nanotube Logic Circuits
  • Novel Techniques for Stateful Memristor Logic
  • Skyrmion Logic
  • Spintronic FPGA

ORCID page

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Recent Submissions

  • Overhead Requirements for Stateful Memristor Logic 

    Hu, Xuan; Schultis, Michael J.; Kramer, Matthew; Bagla, Archit; Shetty, Akshay; Friedman, Joseph S. (IEEE-Institute of Electrical Electronics Engineers Inc, 2019-01)
    Memristors are being explored as a potential technology to replace CMOS for logic-in-memory systems that exploit the memristive non-volatility. Memristors are two-terminal, non-volatile device that exhibit a variable ...

  • Spice-Only Model for Spin-Transfer Torque Domain Wall MTJ Logic 

    Hu, Xuan; Timm, Andrew; Brigner, Wesley H.; Incorvia, J. A. C.; Friedman, Joseph S. (Institute of Electrical and Electronics Engineers Inc., 2019 IEEE)
    The spin-transfer torque domain wall (DW) magnetic tunnel junction (MTJ) enables spintronic logic circuits that can be directly cascaded without deleterious signal conversion circuitry and is one of the only spintronic ...

  • Graded-Anisotropy-Induced Magnetic Domain Wall Drift for an Artificial Spintronic Leaky Integrate-and-Fire Neuron 

    Brigner, Wesley H.; Hu, Xuan; Hassan, Naimul; Bennett, C. H.; Incorvia, J. A. C.; Garcia-Sanchez, F.; Friedman, Joseph S. (Institute of Electrical and Electronics Engineers Inc., 2019-03-11)
    Spintronic three-terminal magnetic-tunnel-junction (3T-MTJ) devices have gained considerable interest in the field of neuromorphic computing. Previously, these devices required external circuitry to implement the leaking ...

  • Overhead Requirements for Stateful Memristor Logic 

    Hu, Xuan; Schultis, Michael J.; Kramer, Matthew; Bagla, Archit; Shetty, Akshay; Friedman, Joseph S.
    Memristors are being explored as a potential technology to replace CMOS for logic-in-memory systems that exploit the memristive non-volatility. Memristors are two-terminal, non-volatile device that exhibit a variable ...