Silicon-based Thermoelectrics for Microelectronic Applications

Abstract

The large advancement of miniature (∼0.1 cm2 area) silicon integrated circuit (IC) sensors and networking devices for internet-of-things (IoT) and biomedical electronics has prompted the problem of making such devices energy-autonomous, i.e., how to energize such devices reliably and sustainably when they are embedded in isolated environments that have no sunlight for photovoltaics, have no access to wall plug power, and cannot routinely be accessed for regular maintenance or battery replacement. Recently, significant interest has developed in small microelectronic thermoelectric generators (µTEGs) as an autonomous energy source for IoT and biomedical devices wherever a reliable thermal gradient exists. Miniaturized solid-state thermoelectric (TE) devices can interconvert thermal gradients and electric fields for power generation or refrigeration. Most current research on TE technology concentrates on developing new materials with high TE figure-of-merit ZT = α 2σ κ T, where α, κ, σ and T are the material’s Seebeck coefficient, thermal conductivity, electrical conductivity, and the mean operating temperature, because the ideal thermodynamic maximum efficiency of a TEG increases with the ZT of the materials used to form the thermopile. However, high ZT materials are usually toxic or non-earth abundant, expensive to manufacture, and are generally incompatible with the Si IC fabrication process, all of which can substantially increase the cost of integration with standard IC devices, making these materials inappropriate for large-scale integration. Bulk Si is neglected for TE applications because of its poor ZT ∼ 10−2 − 10−3 near room temperature due to its large thermal conductivity. Recently, new opportunities for TE materials have been created because of significant advances in the scientific understanding of nanostructure effects on TE properties. It is now thought to be possible to build nanostructured silicon TEGs with a large reduction in κ due to significant phonon scattering, thus enhancing the ZT of material. In this research, µTEGs with a small area (<< 1 mm2), using doped Si and Si0.97Ge0.03 as the TE material, are fabricated on a standard industrial Si IC process line following the same protocols and process flows used to make commercial IC devices. These µTEGs can generate very large specific power densities (power per unit area for heat flow per square of temperature difference, ∆T ) of 84 µWcm−2K−2, which is comparable to the best existing high ZT bulk TEGs. Moreover, these miniature Si µTEGs can generate voltages exceeding 1.5 V with several µA of current using commonly encountered ∆Ts ∼ 20 to 25 K, which are sufficient to properly energize some existing commercially available low-power IoT ICs. These µTEGs are compatible with industrial fabrication techniques so can be directly integrated on-chip in the same process flow with the circuits they support, providing one solution to energy autonomy at an extremely low marginal cost. These Si-based µTEGs build on an unconventional approach to µTEG device design that emphasizes the application of device physics and circuit engineering principles to optimize a µTEG’s generated power per unit area at any given ∆T, rather than focusing on the thermodynamic efficiency, for applications with a high specific power density as the primary requirement. Using the ability of CMOS processing to fabricate ultrahigh density devices with low packing fraction, we can integrate ∼ 104 thermocouples cm−2 while maintaining a reasonable temperature gradient across the device, thereby producing high total power and voltage density despite relatively low efficiency per TE element. Modern Si processing is also very good at controlling parasitic thermal and electrical resistances, thus minimizing extrinsic degradation of overall TEG performance. Experimental results on µTEG fundamental performance characteristics (i.e. power and voltage generation) as well as TE Peltier cooling are presented. For optimizing the performance of TEGs, Physics-based models at both the material level including the effects of dopant concentration and small percentage Ge alloying, and the device design level including effects of parasitic electrical and thermal resistances and proper design of thermopile packing fraction have been developed. These models help optimize the TEGs to provide maximum power production in future designs. The wide acceptance of TE technology in a broad range of IC applications demands not only the research on suitable TE materials but also understanding the device physics along with the ability to determine basic TE properties such as Seebeck (α) and Peltier (π) coefficients at the device level. A wide range of literature exists on measurement of α but π is rarely measured and is usually derived from α using the first Kelvin relation, π = αT. We have developed a new method for measuring π in any TE device using only standard measured device parameters (i.e thermal impedance and short circuit current) without the need to correct for Ohmic heating (I 2R) that has historically made reliable measurements of π difficult. The experimental verification of the first Kelvin relation is illustrated using the independently measured value of α and π on commercial TE materials.