CUDA au Coq: A Framework for Machine-Validating GPU Assembly Programs
dc.contributor.VIAF | 50151836493420401232 (Hamlen, KW) | |
dc.contributor.author | Ferrell, Benjamin | |
dc.contributor.author | Duan, Jun | |
dc.contributor.author | Hamlen, Kevin W. | |
dc.contributor.utdAuthor | Ferrell, Benjamin | |
dc.contributor.utdAuthor | Duan, Jun | |
dc.contributor.utdAuthor | Hamlen, Kevin W. | |
dc.date.accessioned | 2020-03-11T19:23:06Z | |
dc.date.available | 2020-03-11T19:23:06Z | |
dc.date.issued | 2019-03-25 | |
dc.description | Due to copyright restrictions and/or publisher's policy full text access from Treasures at UT Dallas is limited to current UTD affiliates (use the provided Link to Article). | |
dc.description.abstract | A prototype framework for formal, machine-checked validation of GPU pseudo-assembly code algorithms using the Coq proof assistant is presented and discussed. The framework is the first to afford GPU programmers a reliable means of formally machine-validating high-assurance GPU computations without trusting any specific source-to-assembly compilation toolchain. A formal operational semantics for the PTX pseudo-assembly language is expressed as inductive, dependent Coq types, facilitating development of proofs and proof tactics that refer directly to the compiled PTX object code. Challenges modeling PTX's complex and highly parallelized computation model in Coq, with sufficient clarity and generality to tractably prove useful properties of realistic GPU programs, are discussed. Examples demonstrate how the prototype can already be used to validate some realistic programs. © 2019 EDAA. | |
dc.description.department | Erik Jonsson School of Engineering and Computer Science | |
dc.description.sponsorship | ONR award N00014-17-1-2995, NSF award #1513704, an NSF IUCRC award from Lockheed Martin | |
dc.identifier.bibliographicCitation | Ferrell, B., J. Duan, and K. W. Hamlen. 2019. "CUDA au Coq: A Framework for Machine-Validating GPU Assembly Programs." Design, Automation and Test in Europe Conference and Exhibition, 2019: 474-479, doi: 10.23919/DATE.2019.8715160 | |
dc.identifier.isbn | 9783981926323 | |
dc.identifier.uri | http://dx.doi.org/10.23919/DATE.2019.8715160 | |
dc.identifier.uri | https://hdl.handle.net/10735.1/7390 | |
dc.language.iso | en | |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | |
dc.relation.isPartOf | Design, Automation and Test in Europe Conference and Exhibition, 2019 | |
dc.rights | ©2019 EDAA | |
dc.subject | Graphics processing units | |
dc.subject | Semantics | |
dc.subject | Assembly languages (Electronic computers) | |
dc.subject | Theorem proving | |
dc.subject | Parallel processing (Electronic computers) | |
dc.title | CUDA au Coq: A Framework for Machine-Validating GPU Assembly Programs | |
dc.type.genre | article |
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