Performance and Stability of Solution-Based Cadmium Sulfide Thin Film Transistors: Role of CdS Cluster Size and Film Composition

Improved carrier mobility and threshold voltage (VT) stability in cadmium sulfide (CdS) thin film transistors (TFTs) were studied and attributed to larger grain clusters in thicker CdS films rather than individual crystallite size. Non-zero VT shifts (∼200 mV) in thicker films are attributed to the presence of cadmium hydroxide [Cd(OH)2] at the dielectric/CdS interface resulting from the chemical bath deposition process used to deposit the CdS films. VT and mobility analyses indicate that clusters of CdS grains have a larger impact on TFT performance and stability than the presence of impurities in the bulk of the CdS. TFTs using this fabrication method achieved mobilities of ∼22 cm2/Vs with V T of 7 V and ΔVT of <200 mV after testing. The maximum processing temperature is 100°C which makes this process compatible with flexible substrates.