Sub-millimeter Wave Wideband CMOS Receivers




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The increasing bandwidth of silicon integrated circuits technology has enabled generation of carrier signals at sub-millimeter wave frequencies (greater than 300 GHz), where the narrow fractional bandwidth of carriers translates to large absolute coherence bandwidths. These high frequency carriers and the associated wide coherence bandwidths can make possible high data rate wireless and dielectric waveguide communications. By combining multiple sub-millimeter wave carrier bands (frequency division multiplexing), it is possible to use this portion of the spectrum for even higher bandwidth communication. The transceivers for these applications require only electronic components fabricated in conventional silicon technologies, thus bypassing the complexity of alternative high data rate communication technologies such as photonics that require integration of optical lasers fabricated using III-V technologies. However, implementing a free-space wireless link with sub-millimeter wave carriers is subject to a limited capacity. The transmitted signal in the ideal case experiences attenuation that is inversely proportional to the square of the communication distance. Furthermore, despite the improvement in cut-off frequencies of modern devices, realizing fundamental power gain from active devices at sub-millimeter wave frequencies to provide sufficient transmitted power especially with good power efficiency is still challenging in current silicon technologies. The receiver sensitivity also degrades with operating frequency. These factors ultimately limit the capacity of a sub-millimeter wave wireless communications link because they limit the realizable signal-to-noise ratio of the signal at the receiver output. One way to mitigate these limitations, like in optical fiber communications, is to use a waveguide channel to confine and propagate the modulated carriers to increase the power incident to a receiver. This makes sub-millimeter wave carriers notable candidates for wireline applications. The 315-GHz fully integrated minimum shift keying receiver (MSK) presented in this work can be used for up to 10-Gbps wireline communications at a sensitivity of –21 dBm, requiring 195 mW of power. The receiver tracks the input carrier frequency for synchronization using a phase locked loop receiver architecture. The operating frequency of 315 GHz is the highest for an MSK receiver and for a phase locked loop based receiver that tracks the input signal frequency. To improve sensitivity of receivers, minimizing the receiver noise figure is essential. A 425-to-25 GHz integrated down-converting front-end also presented in this work achieves a noise figure of 17 dB which is the lowest reported for silicon NMOS and SiGe HBT receivers operating above 400 GHz. This is 18 dB lower than the previous minimum noise figure reported around these frequencies. The down-converter is based on a second-order subharmonic push-push mixer and incorporates a hybrid architecture to suppress second harmonic emissions of the local oscillator signal. The down-converter consumes 190 mW of power. This work also demonstrates that a passive switching mixer can have an available output noise power spectral density less than kT, which can make its noise figure less than its conversion loss.



Second harmonic generation, Submillimeter waves, Subharmonic functions, Radio -- Receivers and reception