Bespoke Behavioral Processors

Date

2020-05

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Abstract

Many emerging applications require simple controllers that run the exact same application continuously. These include medical devices and IoTs of different nature. Because of the nature of these applications, they have to be ultra-low power and small. Most of the applications are mapped onto low-power processors that are computationally inexpensive, thus, amenable to be executed on a simple microprocessor. One of the problems of using a general purpose processor, is that not all of the resources are required for a specific application, thus, there is a large potential for simplifying the processor to achieve lower area and power. In addition, these processors can be specified at the behavioral level using High-Level Synthesis (HLS) to generate the RTL automatically. This opens a window for additional optimizations as the processor can be pruned and re-synthesized at different VLSI design levels in order to obtain a smaller and more power-efficient processor. This work presents a methodology to customize a behavioral RISC processor automatically for a given workload such that its area and power are significantly reduced as compared to the original processor. Compared to previous work that customizes a given processor at the gate netlist only, this proposed method helps reduce the area and power significantly by raising the level of abstraction.

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Keywords

Reduced instruction set computers, Electric network synthesis

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©2020 Rohit Sreekumar. All rights reserved.

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