Design of Area- and Power-Efficient Dual-Output Switched-Capacitor DC-DC Converters

Power management integrated circuits have found wide applications in all battery-powered electronic systems like smartphones, wireless sensors, etc., to convert a time-varying unregulated battery voltage to constant regulated DC output voltages for different internal functional blocks of the system. With the increase in the complexity of today’s electronic systems, a multiple-output power management system is desired to optimize the power consumption of each loading block such that the power dissipation of the whole system can be minimized to extend the battery run-time. Driven by the demands for high power efficiency and high area efficiency in generating multiple outputs for energy-harvesting and portable applications, the multiple-output switched-capacitor (SC) DC-DC converter is becoming a popular candidate as it does not require any costly and bulky inductor for energy storage, thereby minimizing the overall converter volume and EMI noise. Moreover, flying capacitors as energy-storage components and power transistors as energy-transfer paths in the multiple-output SC DC-DC converters can be shared by different outputs such that the number of required flying capacitors and power transistors can be minimized to optimize both area efficiency and energy density. In the first part of this research, a reconfigurable step-up dual-output SC DC-DC regulator is introduced, analyzed and verified for low power energy-harvesting applications. A sub-harmonic adaptive-on-time (SHAOT) control scheme is proposed to improve the light-load power efficiency under different load currents, maintain low output ripples under different input voltages, provide predictable output noise spectrum, and minimize output cross regulation between both outputs in the SC DC-DC regulator. In the second part of this research, a battery-connected reconfigurable step-down dual-output SC DC-DC regulator is developed to deliver a maximum load of 1.2A for portable applications. With flying-capacitor sharing and an all-nMOS power stage, the proposed dual-output SC power stage is efficient in both chip and board areas. A switch-resistance-modulation (SRM) control scheme is also proposed to provide small output voltage ripples with a small load capacitance under 100s-of-mA load and to minimize output cross regulation between two outputs under large load-step variations.