Investigation of Electrical Properties of Transition Metal Dichalcogenides Transistors with High-K Dielectrics

Recently, transition metal dichalcogenides (TMDs) have attracted intense attention due to their atomic layer-by-layer structure and unique electronic, optical and mechanical properties. Some of them, such as MoS₂ and WSe₂, have demonstrated satisfactory energy bandgap values and promising properties for future applications in electronics and optoelectronics. However, the relatively inert surface of these materials prevents the direct deposition of high-k dielectrics on these 2-D materials. Furthermore, capacitance-voltage (C-V) measurements of high-k dielectric on TMDs and interface defects analysis have not been researched sufficiently. In this dissertation, fabrication, electrical characterization, and simulation of top-gated few-layer TMD transistors are demonstrated with a major focus on interface property study of high-k/TMD. Top-gated capacitors on bulk MoS₂ with 30 nm HfO₂ and Al₂O₃ dielectrics are characterized with C-V and I-V measurements as the early work, showing the necessity of having a more robust test structure and an in-situ surface treatment to enable better interface assessment with quantitatively study. Top-gated few-layer MoS₂ field effect transistors are fabricated using photolithographic patterning, with less than 10 nm thin ALD HfO₂ on MoS₂ after in-situ UV-O₃ surface functionalization. C-V and I-V measurements are performed on these transistors. Interface defect density is extracted and analyzed from C-V measurement results. Annealing effects, such as cleaning effect of ultra-high vacuum annealing before high-k deposition, and N₂ or a forming gas anneal after device fabrication are demonstrated as well. As a comparison, Al₂O₃/MoS₂ interface is also investigated with/without anneals, and the simulation work demonstrates the energetic and spatial distributions of the interface traps. Furthermore, border traps, which are the dielectric traps close to the high-k/MoS₂ interface, are studied based on electrical characterization and simulation, along with the interface traps. The methodologies of fabrication and characterization are also extended to MoSe₂, to understand the high-k/MoSe₂ interface and annealing effects. The electrical characterization and analysis in this dissertation reveal the high-k/TMD interfacial properties, which potentially helps find the origins of those defects and ultimately improves the electrical performance of the TMD devices by passivating the defects.