Design Space Exploration Using Heuristic Algorithms

dc.contributor.advisorCarrion Schaefer, Benjamin
dc.creatorJayasheelGowda, Monica
dc.date.accessioned2018-10-31T14:50:04Z
dc.date.available2018-10-31T14:50:04Z
dc.date.created2018-08
dc.date.issued2018-08
dc.date.submittedAugust 2018
dc.date.updated2018-10-31T14:50:05Z
dc.description.abstractIn the field of High Performance Computing, Field Programmable Gate Arrays are growing exponentially. The use of the High Level Synthesis Tools has resulted in an increase in the applications which are intensive in computation such as Cognitive Computing Artificial Intelligence due to the ease of its usage. The advantage of the increasing level of abstraction in hardware design is it provides various configurations which have unique properties like area, power, performance which can be generated automatically with no need to write the input descriptions again. All of this would not be possible with the traditional languages such as Verilog or VHDL. This thesis mainly focuses on the above mentioned topic which helps in finding the most optimum solutions for the Design Space Exploration with the implementation of the two Heuristic Algorithms such as the Genetic Algorithm and the Simulated Annealing. This work mainly focuses on the exploration of High level synthesis for the design space exploration and its automation using Qt creator. The Heuristic Algorithms for the Design Space Exploration was developed to obtain the optimum values of the area versus latency. This optimum value is obtained by inserting and varying various attribute knobs like loop unrolling, arrays etc. in the benchmarks. These attributes play a very important role in obtaining the optimum values which can be controlled and tuned with the help of the knobs which generate various configurations of the micro architecture. It is hence not a feasible option to perform a brute search or an exhaustive search on these values due to the large design space and also complex and large designs, as a result this gives rise to the need of heuristic algorithms. The Genetic Algorithm and Simulated Annealing Algorithms are hence explored for each benchmark to obtain an optimum solution if not the best possible solution for a given design space. The comparison of these three types of searches is done using quality metrics like the Average Distance to Reference Set (ADRS) and Dominance which shows that the Genetic Algorithm gives us a better result in comparison to Simulated Annealing. The whole process is automated using Qt Creator which generates a Graphical User Interface for the process of automation.
dc.format.mimetypeapplication/pdf
dc.identifier.urihttp://hdl.handle.net/10735.1/6256
dc.language.isoen
dc.rights©2018 The Author. Digital access to this material is made possible by the Eugene McDermott Library. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.
dc.subjectGraphical user interfaces (Computer systems)
dc.subjectGenetic algorithms
dc.subjectHeuristic algorithms
dc.subjectSimulated annealing (Mathematics)
dc.subjectField programmable gate arrays
dc.subjectHigh performance computing
dc.titleDesign Space Exploration Using Heuristic Algorithms
dc.typeThesis
dc.type.materialtext
thesis.degree.departmentElectrical Engineering
thesis.degree.grantorThe University of Texas at Dallas
thesis.degree.levelMasters
thesis.degree.nameMSEE

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