Browsing by Author "Ma, Dongsheng (Brian)"
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Item 15.6 A 10MHz i-Collapse Failure Self-Prognostic GaN Power Converter with TJ -Independent In-Situ Condition Monitoring and Proactive Temperature Frequency Scaling(Institute of Electrical and Electronics Engineers Inc.) Chen, Yingping; Ma, Dongsheng (Brian); Chen, Yingping; Ma, Dongsheng (Brian)With superior figure of merits, GaN switchs are highly anticipated to replace MOSFETs in high-performance power circuits [1], [2]. However, GaN technology today still faces formidable reliability challenges [3]. While GaN device aging and failure mechanisms are not as well-studied as silicon counterparts, its unique structure and operation also induce new aging and failure problems. Use a GaN switch M_H in a buck converter of Fig. 15.6.1 as an example. As a high-side switch, it faces large-switching-current and high-input-voltage stress in each charge phase. After repetitive switching actions, a number of electron carriers can be injected into the AlGaN barrier and buffer layers, known as hot-electron injection. In discharge phase, M_H is off, but M_L becomes conductive, which shorts the source of M_H to ground, creating high VDS stress on M_H. This induces charge traps in the insulator and buffer layers, known as charge trapping. As a joint effect of both mechanisms, trapped or injected electrons in the insulator, AlGaN barrier and buffer layers repel free electrons in the channel when M_H is on, weakening the 2-dimensional electron-gas (2DEG) layer and further elevating hot-electron injection. This effect, known as current collapse or i- collapse for short, degrades channel conductivity, increases the on-resistance RDS_ON, and is a major cause of GaN-switch aging and failure [3]. On the other hand, another aging cause is thermal effect. To reduce manufacture costs and improve technology compatibility, it is common to fabricate GaN transistors on a silicon substrate. Accordingly, to reduce lattice mismatch, an AlGaN buffer layer is often inserted (Fig. 15.6.1). However, this increases the junction-to-ambient thermal resistance R θJA, which, together with the increased R_{DS_ON} due to the i- collapse, causes higher power and heat generation, elevating the junction temperature, T J. According to Arrhenius' Law, as T J increases, the mean-time-to-failure (MTTF) drops exponentially [4]. Even worse, the elevated T_J deteriorates the i- collapse effect with even higher R_{DS_ON}, significantly reducing device lifetime. ©2019 IEEE.Item 15.7 An 8.3MHz GaN Power Converter Using Markov Continuous RSSM for 35dBμV Conducted EMI Attenuation and One-Cycle TON Rebalancing for 27.6dB VO Jittering Suppression(Institute of Electrical and Electronics Engineers Inc.) Chen, Yingping; Ma, Dongsheng (Brian); Chen, Yingping; Ma, Dongsheng (Brian)GaN power switches have gained fast-growing popularity in power electronics. With a similar R DS_ON resistance, they boast 2-to-3-order lower gate capacitance than silicon counterparts, making them highly desirable in high-frequency (fsw ), high-performance power converters. However, at high f sw , switching transitions have to be completed in much shorter times, creating much larger di/dt and dv/dt changes in power stage, which directly link to electromagnetic-interference (EMI) emissions [1]. To suppress EMI, spread-spectrum-modulation (SSM) techniques [2-5] have been proposed. As depicted in Fig. 15.7.1, a periodic SSM (PSSM) is straightforward and easy to implement. However, its EMI suppression is not effective [2]. A randomized SSM (RSSM) can outperform the PSSM, with lower peak EMI and near-uniform noise spreading, but its performance highly relies on the random clock design. In [3], an N-bit digital random clock was reported to achieve a discrete RSSM (D-RSSM). However, the bit number N has to be large in order to achieve satisfying EMI attenuation, significantly increasing circuit complexity, chip area, and power consumption. To overcome this, a thermal-noise-based random clock was proposed [4]. Unfortunately, thermal noise is very sensitive to temperature and is hard to predict. To apply this approach to a practical implementation requires additional signal processing with periodic signals to confine its range of randomization, which, in turn, reduces the benefits of the RSSM. To achieve a near ideal RSSM, a continuous RSSM (C-RSSM) with a cost-effective implementation is highly preferable. Meanwhile, another challenge of applying SSM schemes lies in the fact that the schemes deteriorate V O voltage regulation. As shown in Fig. 15.7.1, as an SSM scheme continuously or periodically modulates f sw , a converter switching period fluctuates cycle by cycle, causing random errors on the duty ratio and thus jittering effect on V O. This is difficult to correct by a feedback control loop, as the duty-ratio error changes randomly between switching cycles. Due to a limited loop-gain bandwidth, the loop response usually lags far behind. Although a ramp compensation scheme was reported to resolve this [5], the improvement is very limited, and the scheme only works for voltage-mode converters. © 2019 IEEE.Item A 25-MHz Four-Phase SAW Hysteretic Control DC-DC Converter with 1-Cycle Active Phase Count(Institute of Electrical and Electronics Engineers Inc., 2019-02-22) Lee, Bumkil; Song, Min Kyu; Maity, Ahsis; Ma, Dongsheng (Brian); 0000-0002-4457-7157 (Ma, DB); Lee, Bumkil; Song, Min Kyu; Maity, Ahsis; Ma, Dongsheng (Brian)In order to meet stringent power requirements in modern application processors, a 25-MHz four-phase dc-dc power converter is presented. It employs an adaptive window hysteretic control to facilitate ultra-fast transient response and minimize output voltage (VO) undershoot and overshoot during load transient periods. Inherent clock synchronization ability ensures current balancing between phase sub-converters. The control also enables a wide range of programmable VO for dynamic voltage/frequency scaling. To maintain high efficiency over a wide power range without degrading transient speed, a 1-cycle active phase count scheme is introduced. A design prototype was fabricated in a 0.35-μm CMOS process with an active die of 1.88 mm2. Simple circuit structure benefits a power density of 3.98 W/mm2. At a switching frequency of 25 MHz and a nominal input of 3.3 V, it regulates a programmable VO ranging from 0.3 to 2.5 V. It achieves more than 80% efficiency over 96.7% of power range with a peak value of 88.1%. In response to 4-A load step-up/down, it achieves 103 mV/123 mV VO undershoot/overshoot with 1% settling time of 190 ns/237 ns, respectively. ©2019 IEEE.Item GaN Driving Techniques and Circuits for High Performance and High Reliability Power Electronics(2017-12) Ke, Xugang; Ma, Dongsheng (Brian)High frequency DC-DC converters have gained more popularity due to the ever-increasing demand on fast transient response, small solution size and high-power density in power systems. However, as the switching frequency is pushed high up to tens of MHz, the power efficiency is greatly compromised due to a significantly increased switching loss in conventional silicon based solutions. To mitigate this challenge, it is widely believed that Gallium Nitride (GaN) technology would replace conventional silicon technology due to the far superior figure of merits. However, due to the strict requirements on high reliability, high efficiency and low EMI noise in automotive applications, the GaN based DC-DC converter faces new challenges. Therefore, a family of high frequency GaN driver or GaN based DC-DC converter solutions have been developed to address the main design challenges before their wide use in automotive. In this research, a wide input, high reliability GaN gate driver is firstly developed in automotive applications. An active BST balancing scheme is presented to adaptively control the BST charging by directly sensing VSW, and achieve a constant BST rail voltage to prevent GaN from VGS breakdown. With IO/VIN-sensed VSW dual-edge tdead modulation, tdead is adaptively adjusted to achieve ZVS turn-on of MH and ML to improve efficiency. To overcome the EMI challenges in high frequency operation, a tri-slope gate driving GaN DC-DC converter for EMI-regulated automotive electronics is presented. A spurious noise compression technique is proposed to compress and evenly redistribute the spurious noise within a defined frequency sideband, achieving significant EMI noise reduction at main switching frequency and its harmonics. Meanwhile, a tri-slope gate driver is proposed to control the voltage and current slew rates of GaN switches for effective ringing suppression, which is adaptive to load and input voltage changes. To alleviate the ground noise interference and high frequency switching challenges, an on-die ground isolated GaN driver is presented. The ON-duty mirrors adaptively map the ON-duty times of the gate signals from respective input signals to maintain same ON-duty times, and the self-excited tdead minimizers minimize the tdeads between the high side and low side channels. Meanwhile, an on-die ground isolation technique maintains robust states of gate drive signals against DC ground shifting, AC ground bounce and high dv/dt transient at VSW. All the proposed GaN gate drivers and GaN based DC-DC converters have been fabricated, tested to demonstrate the presented schemes or techniques in this research. The effectiveness of the design is successfully verified in the measurement results, not only in steady state, but also in transient scenarios. The high reliability, high efficiency and low EMI performance has been successfully verified to enable the high frequency GaN DC-DC converters for automotive use.Item Methods for on-board Condition Monitoring of SiC MOSFET Based Converters(2022-12-01T06:00:00.000Z) Vankayalapati, Bhanu Teja 1994-; Akin, Bilal; Wong, W. Eric; Ma, Dongsheng (Brian); Gardner, Matthew; Friedman, JosephThe power electronics industry is continuously striving to improve the efficiency and density of power converters. At the same time, with increasing electrification and automation across application domains, the power electronic systems are expected to meet stringent reliability requirements, especially in safety-critical applications such as aerospace, autonomous vehicles, data centers, etc. Silicon Carbide (SiC) power semiconductor devices promise significantly superior electro-thermal performance to traditional silicon IGBTs and MOSFETs. However, given their relative nascence, the field reliability of SiC devices is unproven and certain fundamental reliability challenges exist. This dissertation aims to study on-board condition monitoring methods as a potential solution to addressing reliability challenges with SiC MOSFET based converters. The dissertation first presents a detailed architecture for a modular, highly-scalable accelerated testing platform for SiC MOSFETs. The proposed testing setup enables rapid aging of large batches of SiC MOSFETs for the purpose of generating large datasets to study long-term reliability, and identify electrical precursors that can be used for on-board condition monitoring of SiC devices. Testing on a batch of discrete SiC MOSFETs using the developed test platform revealed the frequent occurrences of gate-open failure in discrete SiC MOSFETs. Therefore, in this dissertation, gate-open failures are systematically studied in the context of SiC MOSFETs, and potential causes for SiC MOSFETs’ increased susceptibility to gate-open failures is discussed. Importantly, a robust cycle-by-cycle gate-open failure detection solution is presented and its superior performance over traditional protection schemes is experimentally validated. Lastly, this dissertation proposes an end-to-end practical online condition monitoring solution for SiC MOSFET- based traction inverters using device on-state resistance (Rds−on) as an aging precursor. The proposed solution includes accurate on-board on-state resistance (Rds−on) measurement circuits along with code-efficient data acquisition and filtering algorithms. Importantly, the presented solution uses a stochastic Bayesian state-of-health estimation algorithm. The algorithm presents an elegant solution to the fundamental problem of separating aging-related Rds−on change from operating conditions-related changes by exploiting the symmetrical nature of the inverter’s operation. In particular, the presented solution is highly scalable as it automatically accounts for device and system level variations and eliminates the need for extensive system/device specific calibration.Item Portable Low Cost Amplifier for a Solid State Radiation Detector(2017-05) Didier, Justin A.; Gnade, Bruce E; Quevedo-López, Manuel A.; Ma, Dongsheng (Brian)Geiger-Mueller Counters filled with 3He have been the standard for detecting neutrons for many years, but the system is expensive, requires high voltage and has limited size scalability. Using solid state radiation detectors provides a significant improvement in cost, size, and performance. The widespread deployment of solid state neutron detector systems will require development of a low power and low cost amplifier. A previously described amplifier design was evaluated, but its high power consumption and BOM cost per diode area of $0.69/mm2 made it impractical for a portable and cost effective application. The proposed amplifier design is based on using off-the- shelf components and consumes less current, provides higher gain with higher signal-to-noise ratio, more tolerance to higher diode capacitance than previous amplifiers and a BOM cost per diode area of $0.026/ mm2.