An Efficient Bayesian Yield Estimation Method for High Dimensional and High Sigma SRAM Circuits

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dc.contributor.authorZhai, J.
dc.contributor.authorYan, C.
dc.contributor.authorWang, S. -G
dc.contributor.authorZhou, Dian
dc.contributor.utdAuthorZhou, Dian
dc.date.accessioned2019-07-12T23:15:32Z
dc.date.available2019-07-12T23:15:32Z
dc.date.created2018-06-24
dc.descriptionFull text access from Treasures at UT Dallas is restricted to current UTD affiliates (use the provided Link to Article). Non UTD affiliates will find the web address for this item by clicking the "Show full item record" link, copying the "dc.relation.uri" metadata and pasting it into a browser.
dc.description.abstractWith increasing dimension of variation space and computational intensive circuit simulation, accurate and fast yield estimation of realistic SRAM chip remains a significant and complicated challenge. In this paper, du Experiment results show that the proposed method has an almost constant time complexity as the dimension increases, and gains 6x speedup over the state-of-the-art method in the 485D cases.
dc.description.departmentErik Jonsson School of Engineering and Computer Science
dc.description.sponsorshipNational Major Science and Technology Special Project of China (2017ZX01028101-003); National Natural Science Foundation of China (NSFC) research projects 61674042, 61574044, 61574046, 61774045, and 61628402; NSF Grant 1115564.
dc.identifier.bibliographicCitationZhai, J., C. Yan, S. -G Wang, and D. Zhou. 2018. "An efficient bayesian yield estimation method for high dimensional and high sigma SRAM circuits." Proceedings - Design Automation Conference, 55, vol. 137710: art. 132, doi:10.1145/3195970.3195987
dc.identifier.isbn9781450357005
dc.identifier.urihttps://hdl.handle.net/10735.1/6704
dc.identifier.volume137710
dc.language.isoen
dc.publisherInstitute of Electrical and Electronics Engineers Inc.
dc.relation.urihttp://dx.doi.org/10.1145/3195970.3195987
dc.rights©2018 Association for Computing Machinery
dc.source.journalProceedings - Design Automation Conference, 55
dc.subjectComputer-aided design
dc.subjectTiming circuits
dc.subjectBayesian statistical decision theory
dc.subjectSRAM (Static random access memory)
dc.subjectIntegrated circuits--Computer simulation
dc.subjectElectronic circuits--Computer simulation
dc.titleAn Efficient Bayesian Yield Estimation Method for High Dimensional and High Sigma SRAM Circuits
dc.type.genrearticle

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