Design Techniques for Volume-Efficient Soft-Switched Power Converters with Enhanced Power Efficiency and Reliability

dc.contributor.advisorLee, Hoi
dc.creatorCong, Lin
dc.date.accessioned2021-01-27T16:21:06Z
dc.date.available2021-01-27T16:21:06Z
dc.date.created2020-12
dc.date.issued2020-10-06
dc.date.submittedDecember 2020
dc.date.updated2021-01-27T16:21:07Z
dc.description.abstractZero voltage switching technique has been popular in high voltage DC-DC converter design to increase the switching frequency while maintaining high power efficiency and thus reducing the volume of passive components. Recently, enhancement-mode GaN FETs attracts more and more attention in high voltage converters for better figure of merits in RDSON and QG compared with the traditional MOSFETs. Although GaN FETs have been used in soft-switched DC-DC converters to further improve the power efficiency and power density, GaN FETs can cause more power loss in the third quadrant conduction than traditional MOSFETs if the dead time is not precisely controlled. In addition, fast transition of GaN FETs requires the high-voltage level shifter handle much faster dv/dt without creating logic errors. This dissertation develops a novel GaN driver with adaptive dead time control scheme, based on an innovative methodology of slope-sensing ZVS detection to minimize the third quadrant conduction time of GaN FETs. Also, a differential-mode noise blanking scheme is proposed to increase the dv/dt noise immunity of the high voltage level shifter. The proposed GaN driver can help to reduce power loss by 1.6W and achieve 90.2% power efficiency at 150V input and 2MHz frequency, or 88.6% power efficiency at 400V input and 1MHz frequency. Traditional non-isolated ZVS converters utilize an auxiliary branch to assist soft-switching operation of the active FET. In multiphase topologies or non-inverting buck-boost topology, each active power FET requires an auxiliary branch such that the total number and volume of auxiliary components make the traditional ZVS scheme infeasible. This dissertation proposes a new passive-saving technique to share one auxiliary branch between two active FETs such that the total number and volume of auxiliary components can be reduced by 50%. It is worth to notice that the proposed passive-saving technique can be applied to both ZVS and ZVT topologies. Traditional ZVT converters adopted fixed on-time of the auxiliary switch for simplicity. Since the auxiliary current ripple cannot scale with the load current, power efficiency at light load condition is quite limited. This dissertation proposes a monolithic control loop to regulate the auxiliary current ripple according to load current. Compared with the traditional ZVT converters, the proposed converter with auxiliary current control scheme can improve light load efficiency by 14.5% without folding back switching frequency.
dc.format.mimetypeapplication/pdf
dc.identifier.urihttps://hdl.handle.net/10735.1/9138
dc.language.isoen
dc.subjectDC-to-DC converters
dc.subjectGallium nitride
dc.subjectField-effect transistors
dc.titleDesign Techniques for Volume-Efficient Soft-Switched Power Converters with Enhanced Power Efficiency and Reliability
dc.typeThesis
dc.type.materialtext
thesis.degree.departmentElectrical Engineering
thesis.degree.grantorThe University of Texas at Dallas
thesis.degree.levelDoctoral
thesis.degree.namePHD
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