Browsing by Author "Young, Chadwin D."
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Item A Multifield and Frequency Electrically Detected Magnetic Resonance Study of Atomic-Scale Defects in Gamma Irradiated Modern MOS Integrated Circuitry(IEEE-Institute of Electrical and Electronics Engineers Inc, 2018-11-09) Myers, K. J.; Waskiewicz, R. J.; Lenahan, P. M.; Young, Chadwin D.; 0000-0003-0690-7423 (Young, CD); Young, Chadwin D.The role of specific atomic-scale defects involved in total ionizing dose radiation in the metal-oxide-semiconductor field-effect transistors of the 1980s and 1990s was identified in large part with electron paramagnetic resonance (EPR) techniques. The techniques involved in those studies were classical EPR and, to a lesser extent, electrically detected magnetic resonance (EDMR). We show that somewhat more sophisticated resonance-based measurements can be fruitfully applied to explore the atomic-scale basic mechanisms of the significantly more complex, generally messier, and much smaller devices of the present day. We present multifield and frequency EDMR measurements in which the response is observed via spin-dependent leakage currents, spin-dependent charge pumping, and spin-dependent gated diode recombination currents. We also exploit isotopic substitution, replacing hydrogen with deuterium, monitoring the isotopic effects on the resonance response. The approaches utilized in this paper should be applicable to radiation damage studies in a wide variety of emerging materials and devices.Item A New Analytical Tool for the Study of Radiation Effects in 3-D Integrated Circuits: Near-Zero Field Magnetoresistance Spectroscopy(Institute of Electrical Electronics Engineers Inc, 2018-12-06) Ashton, James P.; Moxim, Stephen J.; Lenahan, Patrick M.; McKay, Colin G.; Waskiewicz, Ryan J.; Myers, Kenneth J.; Flatte, Michael E.; Harmon, Nicholas J.; Young, Chadwin D.; 0000-0003-0690-7423 (Young, CD); Young, Chadwin D.We demonstrate that a new technique, near-zero field magnetoresistance (NZFMR) spectroscopy, can explore radiation damage in a wide variety of devices in a proof-of-concept study. The technique has great potential for the study of atomic-scale mechanisms of radiation damage in 3-D integrated circuits. In our study, we explore radiation damage in structures relevant to 3-D integrated circuits, but not on 3-D test structures themselves. Five structures of great technological importance to 3-D integrated circuits are investigated. We utilize both NZFMR and electrically detected magnetic resonance to investigate radiation effects in these structures. The structures involved in this paper are planar silicon metal-oxide-semiconductor field-effect transistors, silicon-germanium alloy-based transistors, fin-based transistors, silicon dioxide-based flowable oxides, and low-k dielectrics. Our study indicates that NZFMR has great potential in radiation damage studies, with exceptional promise in systems in which more conventional resonance is not possible.Item A Steep-slope Threshold Switching Selector Using Silver-doped Polycrystalline Zinc Oxide: Fabrication, Characterization, & Application for 3D X-point Memory & Neuromorphic Devices(December 2021) Sahota, Akshay; Kim, Jiyoung; Farago, Andras; Gu, Qing; Lee, Jeong-Bong; Young, Chadwin D.An assortment of emerging non-volatile memory (NVM) devices has displayed a surge of interest in being investigated for their implementation in energy-efficient bio-inspired neuromorphic computing. The intrinsic device physics of NVMs give them the capability to be employed for emulating the dynamics of a biological neuron and synapse. NVM devices are connected in a dense cross (X)-point circuit architecture thus enabling massive system-level parallelism necessary for a neural network. However, the leakage/sneak current that typically arises from neighboring unselected memory cells is considered as a stumbling block in enlarging X-point arrays. Metalfilament threshold switch has been suggested as a selector device, demonstrated on low leakage characteristics, that holds potentiality due to its straightforward metal-insulator-metal structure, superior performance, and excellent CMOS process compatibility. This dissertation demonstrates research study on the electrical and surface characterization of nano-polycrystalline silver-doped zinc oxide (ZnO) thin films for threshold switching selector device, to propose a way for amending the prevalent selector drawbacks: threshold voltage (Vth) variabilities i.e., intercell and cycle-to-cycle shifts and lousy DC cycling endurance. The current work demonstrates a novel approach to subside system variabilities by uniformly doping a crystalline selector medium i.e., ZnO with Ag metal atoms, rather than incorporating an Ag active metal layer/electrode. First, electrochemical deposition (ECD) process has been employed to slightly dope ZnO with Ag, because of its admirable dopant concentration controllability having atomic percent precision. ECD process helps in demonstrating the proof-of-concept experiment and provides an understanding of volatile switching behavior when ZnO is lightly doped with Ag. Next, “supercycle ALD” technique has been evaluated, where alternating ZnO ALD and Ag metal ALD was employed for lightly doping/delta doping ZnO with Ag. To fend off the shortcomings/drawbacks associated with both the ECD and ALD processes, RF magnetron co-sputtering process is the last fabrication method put to evaluation. Co-sputtering technique provides the wherewithal to control Ag doping levels when lightly doped composite targets (ZnO/Ag 100-x/x at. %, x=1,3,10) are employed. The switching parameters were observed to significantly improve and the trends have been explained based on surface characterizations with XPS, GIXRD, AFM, SEM, EDAX, ICP-MS, HR-TEM, and semiconductor parameter analyzer.Item Charge Transport and Device Physics in Fullerene-based Organic Photovoltaics(2021-08-01T05:00:00.000Z) Mosur Saravana Murthy, Lakshmi Narayanan; Hsu, Julia W. P; O, Kenneth K.; Vandenberghe, William G.; Quevedo-Lopez, Manuel A.; Young, Chadwin D.Organic photovoltaics (OPV) has been one of the consistently researched photovoltaic (PV) technology for the past three decades. Efficient charge generation, charge transport, and collection process account for higher performance in OPV devices. Several donor and nonfullerene (NFA) acceptors are developed to enhance charge generation. However, charge transport and collection still need critical understanding to further boost the device performance. In this dissertation, we focus on characterizing the defect states for efficient charge collection and charge transport mechanism in fullerene-based OPV devices. Surface photovoltage spectroscopy (SPS) was applied to probe the defect states without fabricating the complete devices. The physical location and the energetics of defect states are determined by comparing two types of SPS and top layer deposition. Understanding the charge transport mechanism is highly important in fullerene-based OPVs, where donor concentration is too low to form a percolation path to the anode. The effect of device architecture was studied to gain insights into the charge transport in fullerene-based OPV devices. From experimental results combined with drift-diffusion simulations, we found the imbalance in carrier mobility between electrons and holes results in inferior performance in inverted devices. Thienothiophene (TT)-based small molecule donors was designed and synthesized to study the photocurrent generation in fullerenebased OPVs. The donor and acceptor must form type-II energy level alignment at its interface for efficient exciton dissociation. We showed that the hole back transfers from donor to acceptor and transports to the anode via fullerene matrix. The photocurrent generation results from the hole back transfer mechanism in fullerene-based OPVs.Item Differential Ion Motion in Perovskite Light Emitting Electrochemical Cells(2022-05-01T05:00:00.000Z) Mishra, Aditya; Slinker, Jason D; Moheimani, Reza; Hsu, Julia W.P.; Young, Chadwin D.; Zakhidov, Anvar A.Perovskite light emitting diodes (PeLED) have shown promising progress as next-generation efficient electroluminescent devices. However, PeLEDs suffer from low lifetimes and color instability during operation that limits its insertion into most practical applications. To address this concern, I investigated a form of perovskite light-emitting device termed perovskite light-emitting electrochemical cells (PeLECs) that utilize a phenomenon of selective differential ion motion in perovskite devices. I have been exploring an interesting phenomenon of “differential ion motion” in PeLECs, where under applied bias, additive ions (LiPF6) selectively move while restricting the motion of intrinsic perovskite ions. This interplay of intrinsic and additive ions enhances the efficiency and operational stability of PeLECs. In differential ion motion, the perovskite structure remains stable while sacrificial additive ions move in response to the applied electric field. These additive ions accumulate at respective electrodes (anions at anode and cations at the cathode) and improve electronic charge injection (electron and holes) by the formation of electrical double layers (EDLs) at the electrode interfaces. Specifically, I fabricated and characterized PeLECs, directly measuring their luminance-currentvoltage characteristics, quantum efficiency, power efficiency, electroluminescence (EL) spectra, operational stability. To understand the fundamental materials science behind device performance, I have performed numerous materials and device characterizations such as electron microscopy (SEM, TEM), spectroscopy (XPS, UV-Vis), crystallography (XRD), force microscopy (AFM), reliability testing, electrochemical circuit design, and photoluminescence (PL) spectra, lifetime, and quantum yield. We demonstrated that optimized Li salt additive improves thin film morphology, increases PL stability and quantum yield, reduces charge traps, and strengthens the perovskite chemical bonding. Then, we hypothesized differential ion motion phenomenon and showed long lifetimes at constant current, calculated EDLs thickness by using electrochemical impedance circuit model. We also demonstrated voltage-controlled color-tunable perovskite host-ionic guest (Ir-ionic transition metal complex) LECs. We observed the benefits of differential ion motion in pure blue light-emitting mixed-halide perovskite, where we effectively suppressed detrimental halide segregation under intense photoexcitation and electrical bias that facilitated us to obtain longawaited stable blue PeLECs satisfying technological emission standards. Additionally, we integrated highly emissive zero-dimensional perovskite into a 3D perovskite matrix through a novel solvent engineering method that demonstrated high quantum efficiency and operational stability facilitated by differential ion motion. PeLECs have shown superior operational stability (initial luminance level of 3200 cd/m2, 120 h— extrapolates to 30,000 h half-life at 100 cd/m2, the common industrial benchmark for a lifetime) and high color-purity (Full-width half maximum of EL spectra ≤ 18 nm). Pure Blue emission from PeLECs meets all the National Television System Committee (NTSC) requirements. These PeLECs are simple single-layer devices that offer ease of processing (low-temperature and costeffective) for facile fabrication of large-area display and lighting applications. Leveraging differential ion motion in PeLECs demonstrates a new pathway of utilizing simple and smart, wearable devices for the internet of things (IoT) for digital communication and fashion.Item Dual-Gate MoS₂ Transistors with Sub-10 NM Top-Gate High-K Dielectrics(American Institute of Physics Inc.) Bolshakov, Pavel; Khosravi, Ava; Zhao, Peng; Hurley, P. K.; Hinkle, Christopher L.; Wallace, Robert M.; Young, Chadwin D.; 0000-0002-3530-6400 (Zhao, P); 0000-0001-5566-4806 (Wallace, RM); 0000-0003-0690-7423 (Young, CD); Bolshakov, Pavel; Khosravi, Ava; Zhao, Peng; Hinkle, Christopher L.; Wallace, Robert M.; Young, Chadwin D.High quality sub-10 nm high-k dielectrics are deposited on top of MoS₂ and evaluated using a dual-gate field effect transistor configuration. Comparison between top-gate HfO₂ and an Al₂O₃/HfO₂ bilayer shows significant improvement in device performance due to the insertion of the thin Al₂O₃ layer. The results show that the Al₂O₃ buffer layer improves the interface quality by effectively reducing the net fixed positive oxide charge at the top-gate MoS₂/high-k dielectric interface. Dual-gate sweeping, where both the top-gate and the back-gate are swept simultaneously, provides significant insight into the role of these oxide charges and improves overall device performance. Dual-gate transistors encapsulated in an Al₂O₃ dielectric demonstrate a near-ideal subthreshold swing of ~60 mV/dec and a high field effect mobility of 100 cm²/V·s.Item Electrical Characterization of the Temperature Dependence in CdTe/CdS Heterojunctions Deposited In-Situ by Pulsed Laser Deposition(American Institute of Physics Inc) Avila-Avendano, Jesus Alberto; Quevedo-López, Manuel A.; Young, Chadwin D.; 0000-0003-0690-7423 (Young, CD); Avila-Avendano, Jesus Alberto; Quevedo-López, Manuel A.; Young, Chadwin D.The I-V and C-V characteristics of CdTe/CdS heterojunctions deposited in-situ by Pulsed Laser Deposition (PLD) were evaluated. In-situ deposition enables the study of the CdTe/CdS interface by avoiding potential impurities at the surface and interface as a consequence of exposure to air. The I-V and C-V characteristics of the resulting junctions were obtained at different temperatures, ranging from room temperature to 150 °C, where the saturation current (from 10⁻⁸ to 10⁻⁴A/cm²), ideality factor (between 1 and 2), series resistance (from 10² to 10⁵ Ω), built-in potential (0.66-0.7 V), rectification factor (∼10⁶), and carrier concentration (∼10¹⁶ cm⁻³) were obtained. The current-voltage temperature dependence study indicates that thermionic emission is the main transport mechanism at the CdTe/CdS interface. This study also demonstrated that the built-in potential (V_{bi}) calculated using a thermionic emission model is more accurate than that calculated using C-V extrapolation since C-V plots showed a V_{bi} shift as a function of frequency. Although CdTe/CdS is widely used for photovoltaic applications, the parameters evaluated in this work indicate that CdTe/CdS heterojunctions could be used as rectifying diodes and junction field effect transistors (JFETs). JFETs require a low PN diode saturation current, as demonstrated for the CdTe/CdS junction studied here. © 2018 Author(s).Item Engineering The Palladium-WSe₂ Interface Chemistry for Field Effect Transistors with High-Performance Hole Contacts(Amer Chemical Soc, 2018-12-07) Smyth, Christopher M.; Walsh, Lee A.; Bolshakov, Pavel; Catalano, Massimo; Addou, Rafik; Wang, Luhua; Kim, Jiyoung; Kim, Moon J.; Young, Chadwin D.; Hinkle, Christopher L.; Wallace, Robert M.; 0000-0001-5566-4806 (Wallace, RM); 0000-0003-0690-7423 (Young, CD); 0000-0003-2781-5149 (Kim, J); 0000-0002-6688-8626 (Walsh, LA); 0000-0002-5485-6600 (Hinkle, CD); 0000-0002-5454-0315 (Addou, R); 70133685 (Kim, J); Smyth, Christopher M.; Walsh, Lee A.; Bolshakov, Pavel; Catalano, Massimo; Addou, Rafik; Wang, Luhua; Kim, Jiyoung; Kim, Moon J.; Young, Chadwin D.; Hinkle, Christopher L.; Wallace, Robert M.Palladium has been widely employed as a hole contact to WSe₂ and has enabled, at times, the highest WSe₂ transistor performance. However, there are orders of magnitude variation across the literature in Pd-WSe₂ contact resistance and I-ON/I-OFF ratios with no true understanding of how to consistently achieve high-performance contacts. In this work, WSe₂ transistors with impressive I-ON/I-OFF ratios of 10(6) and Pd-WSe₂ Schottky diodes with near-zero variability are demonstrated utilizing Ohmic-like Pd contacts through deliberate control of the interface chemistry. The increased concentration of a PdSeₓ intermetallic is correlated with an Ohmic band alignment and concomitant defect passivation, which further reduces the contact resistance, variability, and barrier height inhomogeneity. The lowest contact resistance occurs when a 60 min post-metallization anneal at 400 degrees C in forming gas (FG) is performed. X-ray photoelectron spectroscopy indicates this FG anneal produces 3x the concentration of PdSeₓ and an Ohmic band alignment, in contrast to that detected after annealing in ultrahigh vacuum, during which a 0.2 eV hole Schottky barrier forms. Raman spectroscopy and scanning transmission electron microscopy highlight the necessity of the fabrication step to achieve high-performance contacts as no PdSeₓ forms, and WSe₂ is unperturbed by room temperature Pd deposition. However, at least one WSe₂ layer is consumed by the necessary interface reactions that form PdSeₓ requiring strategic exploitation of a sacrificial WSe₂ layer during device fabrication. The interface chemistry and structural properties are correlated with Pd-WSe₂ diode and transistor performance, and the recommended processing steps are provided to enable reliable high-performance contact formation.Item Evaluation and Integration of Graphene Field Effect Devices(2020-04-22) Ravichandran, Arul Vigneswar; Kim, Jiyoung; Young, Chadwin D.Graphene field effect devices have potential applications in emerging analogue and sensing technology. However, to use them in end applications, evaluation of such devices in terms of mobility, contact resistivity, and sheet resistance is pivotal. These fundamental parameters will dictate and enable the designing of futuristic graphene-based devices. Finally, these devices should be packaged depending on the final application or for further evaluation in an industrial perspective. This work explores the evaluation of graphene field effect devices that has been fabricated using Chemical Vapor Deposition (CVD) graphene source with optimization of the device fabrication process flows on 90 nmSiO2 using materials characterization techniques such as Raman spectroscopy, Atomic Force Microscopy, X-ray photoelectron spectroscopy, and spectroscopic ellipsometry. The issues arising with dual-gated graphene transistor is identified and one of the potential solutions to downscale the back-gate dielectric is demonstrated. Critical device parameters like mobility, contact resistivity of graphene devices are evaluated and final integration of such devices at a package level is demonstrated. For commercialization of graphene nanoelectronics, heterogeneous integration of graphene devices on commercially available CMOS substrate is the key and process flow for such devices is demonstrated. Additionally, a novel device architecture to electrically dope graphene in the contact regions is identified and this could pave way for implementation of futuristic graphene devices with tailored device properties.Item Extended-gate MOSFET for High Sensitivity Photodetectors and pH Sensors(2021-12-01T06:00:00.000Z) Liu, Jinbo; Young, Chadwin D.; Hu, Walter; Anderson, William; Frensley, William R.; Zakhidov, Anvar A.; Gu, QingOver the past years, semiconductors have been greatly used in sensors. With the development semiconductor technology, the semiconductor sensors showed high sensitivity, large integration and reliable stability. Ion-Sensitive Field Effect Transistor (ISFET) changed the gate electrode of Metal-oxide-semiconductor Field Effect Transistor (MOSFET) from metals to electrolyte. In this dissertation, the perovskite, which is a kind of material with large light absorption coefficient, is used to replace the electrolyte in ISFET based on the structure of ISFET to create high sensitivity photodetector. The perovskite is deposited on a silicon wafer and physically separated with MOSFET. Besides taking both advantages of perovskite with excellent optoelectrical property and silicon as a single crystal with good electrical property to get high responsivity, this extended-gate structure provides convenience for changing the capacitance of perovskite and removing the influence of light on MOSFET. The frequency of electrical signal on perovskite can modulate the capacitance of perovskite, which can be used when the capacitance of perovskite is too high compared with MOSFET. The ionic movement influence, which degrees the performance of this photodetector, can be reduced by adding another MOSFET served as current source at the gate of original MOSFET. Inspired by the ionic movement of perovskite, this dissertation also proves ionic movement in pH electrolyte deteriorates the sensitivity of ISFET by electrical measurement. The extended gate structure is utilized to separate the MOSFET and pH capacitance so the MOSFET is free from changing of temperature. Low temperature can decrease the mobility of ions in pH electrolyte especially after the phase change from liquid to solid. The ions in electrolyte can’t follow the high frequency bias voltage so the ionic movement is less at high frequency. Our results show that the ISFETs have larger sensitivity in low temperature and high frequency since the ionic movement can be suppressed by low temperature and high frequency.Item Ferroelectric TiN/Hf₀.₅Zr₀.₅O₂/Tin Capacitors with Low-Voltage Operation and High Reliability for Next-Generation FRAM Applications(Institute of Electrical and Electronics Engineers Inc.) Kim, Si Joon; Mohan, Jaidah; Young, Chadwin D.; Colombo, Luigi; Kim, Jiyoung; Summerfelt, S. R.; San, T.; 0000-0003-0690-7423 (Young, CD); 0000-0003-2781-5149 (Kim, J); 70133685 (Kim, J); Kim, Si Joon; Mohan, Jaidah; Young, Chadwin D.; Colombo, Luigi; Kim, JiyoungIn this study, we investigated the ferroelectric properties of Hf₀.₅Zr₀.₅O₂ (HZO) thin films with different thicknesses (5-20 nm) deposited by atomic layer deposition for the development of future ferroelectric random access memory cells. HZO-based capacitors with a thickness of 5 nm exhibited a switching polarization of ~13 μC/cm² and a ferroelectric saturation voltage of 1.0 V as extracted from the pulse write/read measurements. Furthermore, we performed fatigue measurements and we found no degradation up to 10¹⁰ switching cycles at 1.2 V.Item First Principles Studies on Oxide Semiconductors for Back-end-ofline Transistor Applications(May 2023) Hu, Yaoqiao; Cho, Kyeongjae; Chen, Feng; Toher, Cormac; Young, Chadwin D.; Quevedo-Lopez, ManuelThe development of high-performance p-type and n-type oxides with good carrier mobilities and wide band gaps is critical for the applications of metal oxide (MO) semiconductors in back-endof-line (BEOL) CMOS devices. [S. Salahuddin et al. Nat Electron. 1, 442 (2018)] Currently available oxide semiconductors are limited to n-type conduction, and p-type oxides have inferior performance due to carrier mobilities and dopability which are significantly lower than that of their n-type counterparts. This thesis devotes to studying and identifying novel high mobility p-type oxide candidates with wide band gaps and robust phase stabilities. Using first principles studies, we have identified several promising candidates including Rb2Sn2O3, TiSnO3, Ta2SnO6, and Sn5(PO5)2 that would be of interest as high-mobility p-type oxides. An engineering method is also developed to enhance the bandgap and hole mobility in widely investigated p-type oxide SnO. Amorphous phase engineering is revealed effectively improving the hole dopability and hole transport. Electron transport study on n-type oxides sheds light on the defect controlling and film density engineering in improving the n-type BEOL device performances. Our results provide fundamental materials insights into rational design of high mobility oxides semiconductors and serve as a guide for experimental realization of oxide semiconductors based BEOL transistors.Item Gallium Oxide Semiconductor MOS Capacitors With Atomic Layer Deposited High-K Dielectrics(2022-12-01T06:00:00.000Z) Hawkins, Roberta Claire; Young, Chadwin D.; Lu, Hongbing; Quevedo-Lopez, Manuel; Vandenberghe, William; Ketterson, AndrewBeta-Gallium Oxide (β-Ga2O3) has garnered significant interest as a semiconductor for high-power and optical devices because of its wide bandgap and its availability in wafer form, in addition to supporting a wide range of epitaxial materials with various dopants. A variety of dielectric materials are available for creating MOS devices using β-Ga2O3 substrates. A suitable dielectric must have a high dielectric constant and a sufficient bandgap offset to prevent Fowler-Nordheim or direct tunneling of electrons. Al2O3, SiO2, and HfO2 are potential candidates due to relatively high band offsets with β-Ga2O3 and conceivable ease of integration. This work is composed of several studies which investigate the effects of surface treatments, such as chemical cleaning, plasma etching, or heat treatments of the β-Ga2O3/ dielectric interface, on MOS capacitor performance using capacitance-voltage and current-voltage analysis techniques. The purpose of this research is to contribute to the overall development of β-Ga2O3 technology especially in the areas of dielectric interfaces and oxide reliability.Item Investigation of Critical Interfaces of Transition Metal Dichalcogenide Devices for Future Device Applications(2019-11-18) Bolshakov, Pavel; Young, Chadwin D.Recently, transition metal dichalcogenides (TMDs) have drawn significant attention due to their two-dimensional structure and unique properties that show the potential for applications in various devices such as transistors, solar cells, and sensors. Initial TMD devices have demonstrated promising results in terms of device performance. However, the high contact resistance and Fermi level pinning at the contact metal – TMD interface prevents efficient carrier injection in electronic devices. Furthermore, the interactions at the bottom-gate high-κ dielectric – TMD interface and at the top-gate high-κ dielectric – TMD interface have not been sufficiently studied using I-V analysis. In this dissertation, device fabrication, physical and electrical characterization, and enhanced device analysis of dual-gate MoS2 field-effect-transistors are demonstrated with a focus on the critical interfaces. Bottom-gate MoS2 transistors and capacitors with high-κ dielectrics are characterized using I-V and C-V measurements to determine the influence of the bottom-gate dielectric on top-gate transistor performance. Electrical characterization through the dual-gate transistor fabrication process is done to determine the type of charge HfO2 introduces on the top MoS2 surface compared to Al2O3/HfO2 bilayer. Dual-gate sweeping methodology is introduced to TMD transistors in order to understand the influence of the top-gate dielectric compared to the bottom-gate dielectric on device performance. An oxygen plasma clean is used during device contact patterning to functionalize the MoS2 surface to de-pin the Fermi level and allow for low contact resistance formation. Low contact resistance combined with high quality high-κ dielectric gate stacks in conjunction with dual-gate sweeping is studied. Devices with sub-thermionic transport are observed and enhanced I-V analysis and modeling is done to determine the potential origins of the sub-60 mV/dec phenomenon. The electrical and physical characterization and analysis of critical interfaces of TMD devices in this dissertation provides insights into the interfacial influence on device performance and the origins of any defects present.Item Investigation of Electrical Properties of Transition Metal Dichalcogenides Transistors with High-K Dielectrics(2018-08) Zhao, Peng; 0000-0002-3530-6400 (Zhao, P); Young, Chadwin D.Recently, transition metal dichalcogenides (TMDs) have attracted intense attention due to their atomic layer-by-layer structure and unique electronic, optical and mechanical properties. Some of them, such as MoS₂ and WSe₂, have demonstrated satisfactory energy bandgap values and promising properties for future applications in electronics and optoelectronics. However, the relatively inert surface of these materials prevents the direct deposition of high-k dielectrics on these 2-D materials. Furthermore, capacitance-voltage (C-V) measurements of high-k dielectric on TMDs and interface defects analysis have not been researched sufficiently. In this dissertation, fabrication, electrical characterization, and simulation of top-gated few-layer TMD transistors are demonstrated with a major focus on interface property study of high-k/TMD. Top-gated capacitors on bulk MoS₂ with 30 nm HfO₂ and Al₂O₃ dielectrics are characterized with C-V and I-V measurements as the early work, showing the necessity of having a more robust test structure and an in-situ surface treatment to enable better interface assessment with quantitatively study. Top-gated few-layer MoS₂ field effect transistors are fabricated using photolithographic patterning, with less than 10 nm thin ALD HfO₂ on MoS₂ after in-situ UV-O₃ surface functionalization. C-V and I-V measurements are performed on these transistors. Interface defect density is extracted and analyzed from C-V measurement results. Annealing effects, such as cleaning effect of ultra-high vacuum annealing before high-k deposition, and N₂ or a forming gas anneal after device fabrication are demonstrated as well. As a comparison, Al₂O₃/MoS₂ interface is also investigated with/without anneals, and the simulation work demonstrates the energetic and spatial distributions of the interface traps. Furthermore, border traps, which are the dielectric traps close to the high-k/MoS₂ interface, are studied based on electrical characterization and simulation, along with the interface traps. The methodologies of fabrication and characterization are also extended to MoSe₂, to understand the high-k/MoSe₂ interface and annealing effects. The electrical characterization and analysis in this dissertation reveal the high-k/TMD interfacial properties, which potentially helps find the origins of those defects and ultimately improves the electrical performance of the TMD devices by passivating the defects.Item Investigation of Negative Bias Temperature Instability Dependence on Fin Width of Silicon-On-Insulator-Fin-Based Field Effect TransistorsYoung, Chadwin D.; Neugroschel, Arnost; Majumdar, Kausik; Matthews, Ken; Wang, Zhe; Hobbs, Chris; Young, Chadwin D.; Neugroschel, Arnost; Majumdar, Kausik; Matthews, Ken; Wang, Zhe; Hobbs, ChrisThe fin width dependence of negative bias temperature instability (NBTI) of double-gate, fin-based p-type Field Effect Transistors (FinFETs) fabricated on silicon-on-insulator (SOI) wafers was investigated. The NBTI degradation increased as the fin width narrowed. To investigate this phenomenon, simulations of pre-stress conditions were employed to determine any differences in gate oxide field, fin band bending, and electric field profile as a function of the fin width. The simulation results were similar at a given gate stress bias, regardless of the fin width, although the threshold voltage was found to increase with decreasing fin width. Thus, the NBTI fin width dependence could not be explained from the pre-stress conditions. Different physics-based degradation models were evaluated using specific fin-based device structures with different biasing schemes to ascertain an appropriate model that best explains the measured NBTI dependence. A plausible cause is an accumulation of electrons that tunnel from the gate during stress into the floating SOI fin body. As the fin narrows, the sidewall device channel moves in closer proximity to the stored electrons, thereby inducing more band bending at the fin/dielectric interface, resulting in a higher electric field and hole concentration in this region during stress, which leads to more degradation. The data obtained in this work provide direct experimental proof of the effect of electron accumulation on the threshold voltage stability in FinFETs.Item Large Ferroelectric Polarization of TiN/Hf₀․₅Zr₀․₅0₂ Capacitors Due to Stress-Induced Crystallization at Low Thermal Budget(Amer Inst Physics, 2018-10-22) Kim, Si Joon; Narayan, Dushyant; Lee, Jae-Gil; Mohan, Jaidah; Lee, Joy S.; Lee, Jaebeom; Kim, Harrison S.; Byun, Young-Chul; Lucero, Antonio T.; Young, Chadwin D.; Summerfelt, Scott R.; San, Tamer; Colombo, Luigi; Kim, Jiyoung; 0000-0001-7335-1053 (Lee, JS); 0000-0001-9477-5728 (Byun, Y-C); 0000-0003-0690-7423 (Young, CD); 0000-0003-2781-5149 (Kim, J); 70133685 (Kim, J); Kim, Si Joon; Narayan, Dushyant; Lee, Jae-Gil; Mohan, Jaidah; Lee, Joy S.; Lee, Jaebeom; Kim, Harrison S.; Byun, Young-Chul; Lucero, Antonio T.; Young, Chadwin D.; Kim, JiyoungWe report on atomic layer deposited Hf₀․₅Zr₀․₅0₂ (HZO)-based capacitors which exhibit excellent ferroelectric (FE) characteristics featuring a large switching polarization (45 μC/cm²) and a low FE saturation voltage (~1.5V) as extracted from pulse write/read measurements. The large FE polarization in HZO is achieved by the formation of a non-centrosymmetric orthorhombic phase, which is enabled by the TiN top electrode (TE) having a thickness of at least 90nm. The TiN films are deposited at room temperature and annealed at 400 ⁰C in an inert environment for at least 1 min in a rapid thermal annealing system. The room-temperature deposited TiN TE acts as a tensile stressor on the HZO film during the annealing process. The stress-inducing TiN TE is shown to inhibit the formation of the monoclinic phase during HZO crystallization, forming an orthorhombic phase that generates a large FE polarization, even at low process temperatures.Item Mechanism of Fermi Level Pinning for Metal Contacts on Transition Metal Dichalcogenides and Their Interface Thermal Stability(December 2022) Wang, Xinglu; Wallace, Robert; Frensley , William; Fischetti, Massimo V.; Young, Chadwin D.; Kim, Jiyoung; Lv, BingTransition metal dichalcogenides (TMDs) have demonstrated immense potential for application in state-of-the-art electronic, optoelectronic, and spintronic devices because of their outstanding electronic, optical, mechanical, and magnetic properties. However, the failure of tuning the Schottky barrier height by the work function of metal contacts strongly limits the efficiency of carrier injection and hence the electronic performance of TMD-based devices. This dissertation focuses on the interface between covalent and van der Waals metal contacts and TMDs to study the origin and mechanism of Fermi level pinning. Firstly, the interface chemistry and band alignment of Ni and Ag contacts on MoS2 is studied. Then the mechanism of Fermi level pinning of metal contacts on other Mo- and W-based TMDs are uncovered by considering interface chemistry, band alignment, defects and impurities of W-TMDs, contact metal adsorption mechanism and the resultant electronic structure. Also, the thermal stability of Ni/MoS2 systems is investigated in the aspects of interface chemistry, elemental diffusion, and band alignment.Item Micromachined Acoustic Transducers With Embedded Vertical Capacitive Arrays(December 2023) Hossain Bhuiyan, Md Emran 1989-; Pourkamali, Siavash; Hao, Shuang; Friedman, Joseph; Young, Chadwin D.; Minary, MajidAcoustic transducers are the crucial interface between acoustic signals and electrical signals, playing a pivotal role in converting and manipulating sound waves for a wide range of applications across industries and healthcare, such as non-destructive evaluation, range finding, proximity sensing, ultrasonic actuation and sensors, medical imaging probes, therapeutic ultrasound, microphones, and micro speakers. Such applications require transducers operating at frequencies spanning from tens of hertz to hundreds of megahertz. For most of the applications, generating strong acoustical signal is the most important design parameter. Achieving strong acoustic signals and heightened sensitivity demands a high output pressure per transducer unit area. To generate high output pressure per transducer unit area, higher vibration amplitude is required. When a transducer vibrates with a large vibrational amplitude, it can generate high output pressure per surface area even at a lower frequency. For example, when an acoustic membrane generates high output pressure per surface area, it would enable the membrane to produce enough audible sound at low frequency and works as a low frequency speakers or hearing aid instruments. Over the past century, acoustic transducer technology has evolved from piezoelectric crystals to contemporary capacitive micromachined ultrasonic transducer (CMUT) or piezoelectric micromachined ultrasonic transducer (PMUT). However, current piezoelectric or electrostatic micromachined transducer face design and fabrication limitations for generating substantial vibration amplitudes. The main objective of this work is to demonstrate a novel approach that transforms the electrostatic transduction that is conventionally performed by a closely spaced electrode next to the vibrating membrane to an array of electrostatic cells embedded within the membrane. The air gap between the fixed electrode and moveable membrane of the conventional electrostatic acoustic transducers limits the vibration amplitude in the range of tens of nm to few microns. Expanding this gap further is restricted by concerns related to reliability, difficulties in fabrication, and the need for higher operating voltages. The array structures of this research can bypass all the above-mentioned issues and enable the realization of ultrasonic transducers and microspeakers with large out-of-plane displacement, resulting in high sound pressure output per unit area at moderate operating voltage. Extremely narrow air gaps can be made in the vertical electrostatic cells which allows the devices to be operated at low operating voltage while generating high electrostatic force and energy per unit area. Electrostatic cells embedded within the membrane also facilitate the membrane to vibrate with much larger vibration amplitude compared to the conventional devices. Using this novel approach, an acoustic membrane operating in the audible range has shown almost 5 times higher output pressure per surface area per volt compared to the state-of-the-art. Smaller membrane with a resonance frequency in the ultrasonic range would have much higher output pressure per surface area compared to the conventional CMUT and PMUT. This approach can also be used to design a much stronger MEMS micropump for drug delivery, and other MEMS devices where vibrating membrane is the crucial part.Item New Applications for CDTE/CDS Heterojunctions: the Prospects of the Thin-Film JFET(2017-12) Avila Avendano, Jesus A.; 6602171886 (Quevedo-Lopez, MA); Young, Chadwin D.; Quevedo-Lopez, Manuel A.Junction Field Effect Transistors (JFETs) based on II-VI polycrystalline materials are expected to be faster than metal-insulator-semiconductor field-effect transistors (MISFETs) that use the same materials. JFET operation is not based on MIS capacitor theory of operation where generated traps at the oxide-polycrystalline material interface are known to adversely affect the performance of MIS transistors. Pulsed Laser Deposition (PLD) is a physical deposition technique that can transfer precise chemical stoichiometry of the targets onto the substrates. PLD has been demonstrated as an appropriate deposition method for JFET fabrication based in ZnO films. The control of the doping concentration and low leakage currents in PN junction are prerequisites for JFET fabrication. In this dissertation, CdTe/CdS diodes demonstrated low leakage current devices - on the order of nA. Also, CdTe and ZnTe have been doped with Cu, decreasing the resistivity. However, only a Cu doped ZnTe deposited by co-deposition method by PLD modulated the resistivity from 10⁶ to 10² Ω·cm. Simulation results showed that the leakage current values and the doping concentration achieves by PLD are suitable values for JFET fabrication. Masks were designed to fabricate JFETs using a photolithographic process flow. JFETs were fabricated using a Cu:ZnTe(p+)/CdTe(p)/CdS(n+) structure. However, the fabricated JFETs did not show proper behavior because the channel resistivity was not modulated by the gate voltage. Some experiments are proposed as possible solutions to fabricate a fully functioning thin-film JFET with Cu:ZnTe(p+)/CdTe(p)/CdS(n+) structure deposited by PLD.