Browsing by Author "O, Kenneth K."
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Item 0.3 THz CMOS Transceiver Pixels for Reflection Mode Active Imaging(December 2022) Byreddy, Pranith Reddy 1993-; Thuraisingham, Bhavani; O, Kenneth K.; Lee, Mark; Henderson, Rashaunda; Saquib, MohammadElectromagnetic waves at frequencies ranging from 0.1 to 10THz, commonly referred to as THz waves have a wide variety of medical, security and industrial imaging applications. However, generation and detection of signals at these frequencies are quite challenging. The complementary metal-oxide semiconductor (CMOS) technology which is widely used in most of the modern consumer electronic devices is an affordable means for generation and detection of THz signals. Near-millimeter-wave and terahertz imagers are expected to complement visible light, IR, Radar and Light Detection and Ranging (LiDAR) imaging by providing a unique combination of angular resolution and a capability to image in visibly impaired conditions such as fog, rain and dust as well as for imaging through other materials. This research aims at the design of concurrent transceiver pixels operating at frequencies around 300GHz for reflection mode active imaging using a CMOS process technology. A 7-element array of 287-GHz CMOS transceiver pixels with pixel area smaller than (λ/2)2 housed in a QFN package is demonstrated. Each pixel concurrently performs transmission and coherent detection using a push-push VCO, that functions as a 287-GHz transmitter, a 143-GHz LO, and a sub-harmonic mixer at the same time. An effective isotropic radiated power (EIRP) of −2.5dBm and sensitivity of −88dBm for 1-kHz noise bandwidth are achieved. Link budget analyses suggest that it should be possible to perform reflection-mode active imaging at 10 m using the array, and a reflector with a diameter of 15-cm and a simulated near-field gain of 44.6dB. The packaged array exhibits a 2.5-dB higher EIRP and a 3-dB lower noise figure than the array without QFN packaging due to the antenna performance enhancement. This demonstrates that it is possible to package 300- GHz integrated circuits with an on-chip patch antenna using a low-cost technique. Lens-less short-range reflection-mode imaging through cardboard is demonstrated at 275GHz using a pair of concurrent CMOS transceiver pixels separated by ~5mm on a PCB. An isolation study employing EM simulations is performed to quantify the unwanted coupling. This is first such demonstration at frequencies above 100GHz. The separation between the imaged object and pixels is ~1cm and the operation at 275GHz allows the lateral resolution to be reduced to ~2mm due to a smaller wavelength. This pixel achieves an EIRP of -18.9dBm and a double-sided noise figure (NFDSB) of ~51dB in an area of 0.45×0.49 mm2. An 1x3 array of 296-GHz CMOS concurrent transceiver pixels incorporating circuits for baseband signal extraction in addition to the RF section in an area of (λ/2)2 is demonstrated. The EIRP of array is ~-6dBm and NFDSB is ~48dB. An E-shaped patch antenna to broaden the antenna bandwidth is used. Using a pair of these arrays, lens-less short-range reflection-mode imaging of a target ~1cm away through a cardboard is demonstrated. More importantly, use of the arrays improves isolation between the pair by ~10 dB to ~70 dB compared to that when single pixels are used. This work points to a path for incorporation of millimeter and sub-millimeter wave imaging capabilities in a handheld device.Item Charge Transport and Device Physics in Fullerene-based Organic Photovoltaics(2021-08-01T05:00:00.000Z) Mosur Saravana Murthy, Lakshmi Narayanan; Hsu, Julia W. P; O, Kenneth K.; Vandenberghe, William G.; Quevedo-Lopez, Manuel A.; Young, Chadwin D.Organic photovoltaics (OPV) has been one of the consistently researched photovoltaic (PV) technology for the past three decades. Efficient charge generation, charge transport, and collection process account for higher performance in OPV devices. Several donor and nonfullerene (NFA) acceptors are developed to enhance charge generation. However, charge transport and collection still need critical understanding to further boost the device performance. In this dissertation, we focus on characterizing the defect states for efficient charge collection and charge transport mechanism in fullerene-based OPV devices. Surface photovoltage spectroscopy (SPS) was applied to probe the defect states without fabricating the complete devices. The physical location and the energetics of defect states are determined by comparing two types of SPS and top layer deposition. Understanding the charge transport mechanism is highly important in fullerene-based OPVs, where donor concentration is too low to form a percolation path to the anode. The effect of device architecture was studied to gain insights into the charge transport in fullerene-based OPV devices. From experimental results combined with drift-diffusion simulations, we found the imbalance in carrier mobility between electrons and holes results in inferior performance in inverted devices. Thienothiophene (TT)-based small molecule donors was designed and synthesized to study the photocurrent generation in fullerenebased OPVs. The donor and acceptor must form type-II energy level alignment at its interface for efficient exciton dissociation. We showed that the hole back transfers from donor to acceptor and transports to the anode via fullerene matrix. The photocurrent generation results from the hole back transfer mechanism in fullerene-based OPVs.Item Compact, Non-Invasive, High Impedance Detectors in CMOS for Mm-Wave Applications(2018-12) Kshattry, Sandeep; O, Kenneth K.This dissertation investigates uses of mm-wave detectors in complementary metal-oxidesemiconductor (CMOS) for affordable mm-wave circuit characterization. The scaling of CMOS technology has brought significant advances of high frequency capabilities for CMOS integrated circuits. The affordability of CMOS technology, coupled with this ability to operate at the millimeter and sub-millimeter wave frequency range, has opened avenues for many exciting applications with commercial viability. However, going forward the affordability of mm-wave circuits and systems is limited by the test costs and time required to verify the performance. Mm wave measurement testing instruments are expensive because of the high cost of raw materials, limited demand and competition, and the need for customized parts for many applications. On-chip detectors can provide an affordable alternative to high frequency testing. Feasibility of a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) based W-band root-meansquare (RMS) detector for measuring mm-wave voltages using DC measurements is demonstrated in a UMC 65-nm CMOS process. The detector achieves broadband operation from 80-110 GHz with a detector gain of 8.5 V-1 at 60-nA bias. The insertion loss due to the detector relative to a 50-Ω through line is less than 0.15 dB. The compact detector only requires an active area of 20 µm2. Hence, the low power, low loss, compact, broadband and high impedance detectors can be placed at various nodes of circuits for non-invasive voltage measurements. An application of these detectors is measurements of standing wave voltages for characterization of a 280-GHz patch antenna. Several wideband (265GHz -325GHz), high impedance detectors fabricated in a TI 45-nm bulk CMOS process are used to sample the standing wave voltages on a transmission line connected to a 280-GHz patch antenna. The compact detector with an area of 25 µm2 and a responsivity of 70 V/W at 10-nA bias can easily be integrated within the transmission line with virtually no area penalty. Additionally, placing a detector has minimal loading effect as demonstrated by the negligible change of return loss of the structure. Other applications include measurements of the fundamental and second harmonic signals in a frequency doubler using a mode-isolation technique. The effects of second harmonic signal feedback to the input of frequency doubler with an output frequency of 180 GHz is verified using these detectors and a mode-isolation technique. Low loss detectors are placed in a frequency doubler driven by an amplifier. Using the detectors, various circuit properties such as amplitude match between signals on a differential line, optimum biasing point, voltage gain and frequency response are characterized and optimized.Item Deep Learning Methods for Improving Event Extraction on Political and Social Science Studies(2022-05-01T05:00:00.000Z) Skorupa Parolin, Erick; Khan, Latifur; O, Kenneth K.; Wu, Weili; Bastani, Farokh B.; Brandt, Patrick T.Political and social scholars increasingly rely on event coders, which are automated systems that extract structured event representations from news articles, in order to monitor, ana- lyze and predict conflicts and affairs involving political entities across the globe. However, the existing event coders rest on outdated pattern matching techniques, relying on large manually maintained dictionaries composed of lexico-syntactic patterns designed for cap- turing conflict events. Apart from the high costs, time and specialized knowledge required to update and expand such dictionaries, these techniques do not support event extraction on multilingual corpus. As a consequence, the application of existing systems often yields low-recall results and imposes limitations when working with sources coming from different countries and languages. In this dissertation, we propose deep learning based frameworks to obtain state-of-the-art results for extracting structured events from natural language text in political and social sciences domains. We do so by exploring three main directions: (i) automatically extending the external dictionaries and knowledge bases utilized in the current event coders through knowledge extraction techniques; (ii) formulating the event coding task as a classification problem and proposing a supervised deep learning model to solve it; and (iii) developing an innovative deep neural network design by combining state-of-the-art lan- guage representation models with multi-task learning technique to efficiently extract events in a structured format from multilingual corpus. We demonstrate the superiority of our ap- proaches through conducting extensive experiments on real-world multilingual corpora based on political science and conflict domains.Item Functional Performance of a Millimeter Wave Square Holey Dielectric Waveguide(IEEE, 2019-01-20) Aflakian, N.; Gomez, Michael; Miller, C.; Henderson, Rashaunda; MacFarlane, D.; O, Kenneth K.; Gomez, Michael; Miller, C.; Henderson, Rashaunda; O, Kenneth K.This paper presents the functional performance of a square holey dielectric waveguide that operates from 180 to 360 GHz for supporting high data rate communication systems. A 7 cm waveguide is excited using a microstrip patch antenna at 264 GHz and shows 30 dB improvement from the system noise floor and 12 dB improvement from a free space transmission in an uncalibrated measurement. This waveguide minimizes cross talk and allows for polarization division multiplexing supporting vertical and horizontal polarizations.Item Low Noise Integrated Circuits and Systems Using Nano-Scale MOSFETs and Intelligent Post-Fabrication Selection(December 2021) Yelleswarapu, Venkata Pavan Kumar; O, Kenneth K.; Venkatesan, Subbarayan; Henderson, Rashaunda; Ma, Donsheng Brian; Makris, YiorgosRecent advances in integrated radio design have enabled many applications such as wearable healthcare, 5G communication, and beyond 5G or 6G applications for ultra-high data rate communications, high-resolution imaging, sensing, and spectroscopy. All these applications require low noise radio transceivers for achieving high performance. For example, applications requiring high data rate and higher order modulation schemes need to achieve high signal to noise ratio (SNR) and therefore a low noise figure to maintain a low bit-error rate (BER). In addition, noise phenomena like jitter and phase noise can impact the critical parameters like maximum achievable data rate and energy efficiency. This research aims to improve the noise performance of integrated circuits and systems through intelligent post-fabrication selection of an array of nanoscale transistors sized near the minimum in CMOS processes. A phase noise reduction technique in LC Voltage Controlled Oscillators (VCO’s) is demonstrated by post-fabrication selection of a subset of an array of near minimum-size cross-coupled transistor pairs with reduced low frequency noise and thermal noise. The technique reduces the phase noise by taking advantage of the fact that when transistor dimensions are reduced, the low frequency noise and thermal noise vary significantly. Applying an intelligent post-fabrication selection process using a genetic algorithm, the lowest phase noise of -122 dBc/Hz, -127 dBc/Hz, -137.5 dBc/Hz at 600-kHz, 1-MHz, and 3-MHz offsets, respectively from a 3.8-GHz carrier has been measured. The VCO prototype was fabricated in a 65-nm CMOS process and dissipates 7 mW of DC power. The maximum figure of merit (FoM) including phase noise, carrier frequency and power consumption is 191 dBc/Hz and the figure of merit including the VCO core area, FoMA is 207 dBc/Hz. A technique is demonstrated to reduce both the in-band and out-of-band phase noise of a 4-GHz Integer-N PLL by employing an array of individually selectable cross-coupled pairs formed using near minimum-size transistors in an LC VCO and intelligent post-fabrication selection. By reducing both the in-band and out-of-band phase noise, the overall integrated phase jitter in a frequency synthesizer can be minimized. Applying an intelligent post-fabrication selection process, the lowest phase noise of -72 dBc/Hz at 30-kHz offset, -106 dBc/Hz at 300-kHz offset, -121.8 dBc/Hz at 1-MHz offset, and -132.5 dBc/Hz at 3-MHz offset, respectively from a 4.01-GHz locked carrier has been measured. The integrated rms jitter from 100-kHz to 100-MHz offsets is 440 fs. A mixer-first downconverter employing an array of passive mixers formed using near minimumsize transistors and intelligent post-fabrication selection achieves a double sideband noise figure of 4.2 dB at RF of 6 GHz, which is the lowest at 6 GHz for CMOS mixer-first downconverters. The downconverter is fabricated in 65-nm CMOS and demonstrates out-of-band IIP3 and IIP2 of 25 dBm and 65 dBm, respectively at 80-MHz IF, while dissipating 11.5 mW. Post-fabrication selection is performed by a genetic algorithm which takes ~17 generations to converge to the combinations exhibiting the lowest noise.Item Millimeter-wave Packaging Materials and CPW Interconnects on Silicon(August 2022) Mahjabeen, Nikita; Henderson, Rashaunda; Bastani, Farokh; O, Kenneth K.; Blanchard, Andrew J.; Lee, MarkAccurate millimeter wave (mm-wave) circuit and system design is challenging due to un- known dielectric properties above 40 GHz, higher loss due to multimode propagation in substrates, and electromagnetic modeling limitations when compared with on-wafer mea- surement. This dissertation attempts to address these challenges by studying material char- acterization techniques and coplanar waveguide (CPW) line performance on silicon wafers. The dielectric characterization techniques have been investigated from 10 MHz to 110 GHz for substrates and fixed thickness packaging dielectrics. Broadband data using a coaxial line technique was demonstrated for the first time in literature up to 67 GHz. The accuracy of the properties improves for material thicknesses which are greater than half wavelength. For the thin samples, a stacking technique has been introduced to electrically increase the thickness. The broadband data was achieved using a single 1.85 mm airline from 10 MHz to 67 GHz, followed by a WR10 waveguide from 75 to 110 GHz. As resonant techniques are more accu- rate, a microstrip ring resonator was used where the copper trace was printed using a craft cutter tool and was adhered onto non-copper clad materials. This is a fast, low-cost, and non-destructive solution and is suitable for frequencies below 20 GHz. This study will en- able high frequency design solutions for packaging technologies used for antennas-in-package (AiP) and three dimensional (3D) printed RF circuits. Next, broadband loss characterization of coplanar waveguide (CPW) transmission lines has been studied on undoped high resistivity silicon (HRS) from 10 MHz to 325 GHz. Electromagnetic (EM) modeling limi- tations in the Ansys HFSS simulation tool have been examined for full thickness wafers of 525μm and two innovative EM ports were introduced. The bridge-probe lumped port model showed promising results to address the probe parasitics at high frequency. The tunnel wave- port showed simulation capability up to 325 GHz which otherwise would be limited to 80 GHz using general waveport for 400 μm thick substrates. The on-wafer measurement data shows that unwrapped ground, narrow ground width and thinning of substrates can reduce the loss of the lines. A glass spacer was used to separate the wafer from the probe station chuck. Compared to simulation, higher loss was observed in the measured data up to 110 GHz due to a possible unavoidable parasitic surface channel in silicon. This problem can be mitigated by surface passivating the silicon. At frequencies from 140 to 325 GHz, this issue was not observed. The loss of the conventional CPW lines has been used as a baseline to characterize the performance of copper nanowire interconnect technology integrated within the lines. This work can contribute to the advancement of copper-to-copper interconnects for die-to-wafer or wafer-to-wafer connections for 3D packaging technology. The potential of HRS for passive device design was further explored by introducing short and open stubs on the center conductor of CPW lines as filter elements operating up to 325 GHz which showed excellent response compared with simulation.Item Near Millimeter Wave CMOS Receiver and Transmitter(2018-08) Zhong, Qian; O, Kenneth K.Electromagnetic waves in the millimeter (mm) and sub-millimeter wave (sub-mm) frequency ranges have caught a lot of attention. The waves at these frequencies can interact with gas molecules possessing dipole moments and change their rotational states. This phenomenon can be utilized for fast scan rotational spectroscopy to detect gas molecules and measure their concentrations. Rotational spectrometers have a wide range of applications including indoor air quality monitoring, detection of harmful gas leaks, breath analyses for monitoring bodily conditions and many others. At the mm and sub-mm wave frequencies, a large bandwidth is available for extremely high data rate communication. Communication over a dielectric waveguide at these frequencies with a loss less than 10dB/m has been proposed to mitigate the complexity of communication over copper wires as well as the integration challenges for optical communication that are being developed to meet the ever-increasing bandwidth demand. The advances of complementary metal-oxide-semiconductor (CMOS) technology have enabled the implementation of mm-wave and sub-mm wave frequency circuits with reduced cost and increased system integration and complexity. A receiver with a radio frequency front-end bandwidth of 95 GHz and noise figure of 13.9 -19 dB for a rotational spectrometer is demonstrated in 65-nm CMOS. In addition, a 300-GHz QPSK transmitter with a 30-Gbps data rate is demonstrated that consumes 180mW for dielectric waveguide communication. The system level tradeoff of a receiver for rotational spectroscopy is first analyzed with a focus on the noise mechanism. A detailed signal-noise interaction derivation due to a 2nd order non-linearity is presented and signal to noise ratio degradation is shown for different modulation scenarios. A receiver front-end using a broadband antenna backed by a phase compensated artificial magnetic conductor reflector, a floating body antiparallel diode pair as the mixing device and a multi-mode isolated broadband hybrid is demonstrated. The receiver also includes an on-chip LO generator using frequency multipliers and capacitive neutralized power amplifiers, an IF cascode low noise amplifier and a baseband power detector. The receiver exhibits a responsivity of 400-1200 kV/W and noise equivalent power of 0.4 to 1.2 pW/√Hz at 225 to 280 GHz. Detection of Ethanol, Propionitrile (EtCN), Acetonitrile (CH3CN) and Acetone in a mixture is demonstrated using the receiver in a rotational spectroscopy setup. This is the first demonstration that a CMOS receiver can be used for rotational spectroscopy and that a CMOS integrated circuit can support an existing application at frequencies above 200 GHz. A heterodyne transmitter with a current mode logic modulator, a multi-stage constant gain and group delay wideband data buffer using coupled resonators, a double balance passive up-conversion mixer using a Marchand balun which acts as built-in LO spur traps, and a quadrature oscillator with quadrature calibration are demonstrated. The transmitter generates the required RF power for the system of -6 dBm and supports a maximum data rate of 30Gbps while consuming 180mW of power resulting in an energy efficiency of 6 pJ/bit. The single channel data rate is almost 2X higher than that of the previously reported CMOS QPSK transmitter and the energy efficiency is among the highest of CMOS QPSK transmitters operating at the similar frequency range.Item On-Chip High Impedance RMS Voltage Measurements at 265-300 GHz(Institute of Electrical and Electronics Engineers Inc.) Kshattry, Sandeep; O, Kenneth K.; Kshattry, Sandeep; O, Kenneth K.A wideband (265-300 GHz) and high impedance root-mean-square (RMS) detector for on-chip voltage measurements is demonstrated in a 45-nm bulk CMOS process. The detector responsivity is ~70V/W at 10-nA bias. Adding the detector increases the loss of a 140-µm long GCPW thru structure by less than 0.2 dB up to 300 GHz. The compact RMS detectors are placed under a grounded coplanar waveguide feed to a patch antenna with virtually no area penalty, and used to measure the standing wave voltages. The minimum detectable signal of detector is ~37 dBm with a dynamic range of ~40 dB.Item Sub-millimeter Wave Wideband CMOS Receivers(2021-04-27) Momson, Ibukunoluwa Adedapo; O, Kenneth K.The increasing bandwidth of silicon integrated circuits technology has enabled generation of carrier signals at sub-millimeter wave frequencies (greater than 300 GHz), where the narrow fractional bandwidth of carriers translates to large absolute coherence bandwidths. These high frequency carriers and the associated wide coherence bandwidths can make possible high data rate wireless and dielectric waveguide communications. By combining multiple sub-millimeter wave carrier bands (frequency division multiplexing), it is possible to use this portion of the spectrum for even higher bandwidth communication. The transceivers for these applications require only electronic components fabricated in conventional silicon technologies, thus bypassing the complexity of alternative high data rate communication technologies such as photonics that require integration of optical lasers fabricated using III-V technologies. However, implementing a free-space wireless link with sub-millimeter wave carriers is subject to a limited capacity. The transmitted signal in the ideal case experiences attenuation that is inversely proportional to the square of the communication distance. Furthermore, despite the improvement in cut-off frequencies of modern devices, realizing fundamental power gain from active devices at sub-millimeter wave frequencies to provide sufficient transmitted power especially with good power efficiency is still challenging in current silicon technologies. The receiver sensitivity also degrades with operating frequency. These factors ultimately limit the capacity of a sub-millimeter wave wireless communications link because they limit the realizable signal-to-noise ratio of the signal at the receiver output. One way to mitigate these limitations, like in optical fiber communications, is to use a waveguide channel to confine and propagate the modulated carriers to increase the power incident to a receiver. This makes sub-millimeter wave carriers notable candidates for wireline applications. The 315-GHz fully integrated minimum shift keying receiver (MSK) presented in this work can be used for up to 10-Gbps wireline communications at a sensitivity of –21 dBm, requiring 195 mW of power. The receiver tracks the input carrier frequency for synchronization using a phase locked loop receiver architecture. The operating frequency of 315 GHz is the highest for an MSK receiver and for a phase locked loop based receiver that tracks the input signal frequency. To improve sensitivity of receivers, minimizing the receiver noise figure is essential. A 425-to-25 GHz integrated down-converting front-end also presented in this work achieves a noise figure of 17 dB which is the lowest reported for silicon NMOS and SiGe HBT receivers operating above 400 GHz. This is 18 dB lower than the previous minimum noise figure reported around these frequencies. The down-converter is based on a second-order subharmonic push-push mixer and incorporates a hybrid architecture to suppress second harmonic emissions of the local oscillator signal. The down-converter consumes 190 mW of power. This work also demonstrates that a passive switching mixer can have an available output noise power spectral density less than kT, which can make its noise figure less than its conversion loss.Item Switched-capacitor Featured Integrated Power Circuit Design for Next-generation Power Management(2021-05-01T05:00:00.000Z) Wei, Kang; Ma, Dongsheng Brian; Fischetti, Massimo; O, Kenneth K.; Akin, Bilal; Henderson, RashaundaThe rapid proliferation of Internet of Things (IoTs), automotive and consumer electronics establishes strong demands on small system volume, low energy consumption and high level of security. As a key part of these electronic systems, this drives the power electronics to be unprecedentedly compact, efficient and reliable. Consequently, switched-capacitor (SC) power circuits, as an unique family of power electronic circuits, have seen their promising roles in improving power density, adaptability and design flexibility. However, severe design challenges such as power passive implementations, substantial on-die power loss and critical chip activities leakage must be addressed thoroughly. Accordingly, a set of SC featured integrated power circuits are presented in this dissertation to address the above challenges, which have tremendous significance for next-generation power management. Firstly, a reconfigurable three-stage SC DC-DC converter is proposed to extend input range for wireless sensor applications. A three-stage SC topology is constructed by using four fundamental 2:1 SC unit cells to realize eight step-down and step-up conversion ratios with series, parallel and series-parallel configurations while retaining low complexity. A bootstrap rail sharing technique is introduced to implement highly efficient and self-powered gate drivers for power switches. An adaptive pulse emulated hysteretic control improves load transient response and adjusts quiescent power adaptively with frequency-dependent biasing technique. Secondly, a monolithic tri-state SC DC-DC converter is designed for high power density in IoT devices. A tri-state SC topology is presented to reduce voltage stresses on power switches, enhance integrated MOS capacitance density and lower switching noise. It enhances power delivery greatly while achieving decent efficiency with on-die power loss reduction. Two-dimensional multiplechannel interleaving operation increases the equivalent switching frequency largely to further reduce switching noise and improves light-load efficiency with active channel modulation. Thirdly, a high step-down ratio hybrid SC DC-DC converter is developed in this dissertation. The proposed converter adopts the front-end SC power circuits to withstand high input voltage stress and lower switching node voltages in the following inductive topology. Thus, the on-duty time of the converter is extended, and low voltage power devices are used for efficient and fast switching. The online flying capacitor voltage (VCF) rebalancing scheme adaptively adjusts the charge and discharge times of flying capacitors to minimize power mismatch and improve device reliability in steady state. The in-situ precharge rate regulation technique precisely controls two different charge rates of flying capacitors at the start-up, avoiding power device breakdown. Lastly, this dissertation presents an SC-assisted power cipher to improve hardware security against power side-channel attacks. With a SC charge reshaper, the proposed power cipher adopts random charge shaping technique to only encrypt input power profile by using noise injection, supply masking and switching randomization. A parallel encryption interface is designed to manage the interactions between power and security strictly without shoot-through current and regulate the charge reshaper with random ON-time control for minimal power and performance overhead. In this dissertation, the first reconfigurable three-stage SC DC-DC converter is implemented and verified with fully transistor-level HSPICE simulations and the other three SC featured integrated power circuits are fabricated on silicon and measured to successfully validate proposed converter topologies and operation schemes. These experimental results provide strong evidences that the SC power circuits can be integrated as an essential part of next-generation power management strategically to achieve optimal performances among power density, efficiency and security design matrix.Item Terahertz Up-conversion Mixers Using Varactors in CMOS and Their Applications(2022-05-01T05:00:00.000Z) Chen, Zhiyu; O, Kenneth K.; Summers, Joshua; Henderson, Rashaunda M.; Lee, Mark; Saquib, MohammadWireless communication at frequencies above 100 GHz is drawing attention due to its high data rate capability resulting from the wide available bandwidth. The recent advances of the high frequency performance of complementary metal oxide semiconductor (CMOS) technology have made it an affordable way for implementing the wireless systems. In order to support high-order modulations to increase the data rate, and an increased range, the transmitter must have a high output 1-dB compression point (OP1dB) and a wide bandwidth. Since the transistor fmax in CMOS has peaked at ~350 GHz, it is challenging to implement 300-GHz transmitters in CMOS. Consequently, the performance of the last up-conversion mixer in a transmitter is a key factor determining its performance. A 300-GHz sub-harmonic up-conversion mixer using symmetric varactors (SVAR’s) is demonstrated. This mixer takes an IF signal centered at 150 GHz and up-converts to RF at 290 GHz with an LO of 70 GHz. Implemented in 65-nm CMOS, the mixer achieves the maximum conversion gain (CG) of -16 dB and OP1dB of -11.4 dB. The OP1dB when reported was more than 10 dB higher compared to that of the other CMOS sub-harmonic up-conversion mixers in the literature. Fundamental mixing has superior conversion efficiency and output power. To increase CG and OP1dB, a fundamental up-conversion mixer with a similar structure using asymmetric varactors (ASVAR’s) is demonstrated. Using a similar transformer-based hybrid structure, this mixer achieves measured CG of -12.5 dB. The OP1dB is greater than -2 dBm with LO power of 15 dBm at 140 GHz. Due to the imbalance, a -21-dBm leakage at 2fLO is presented at the output. To reduce the generation of unwanted harmonic terms, a double-balanced up-conversion mixer using ASVAR is demonstrated in 65-nm CMOS. It utilizes a power-splitting-transformer hybrid for differential signal isolation. The up-converter achieves measured OP1dB of -6.2 dBm and maximum CG of -11.2 dB including input and output baluns, and a 3-dB bandwidth of ~25 GHz. The CG and OP1dB are the highest among all up-converters in CMOS with RF at ~300 GHz. These results are particularly critical for mixer-last transmitters operating near 300 GHz for high datarate communication. A 280-GHz transmitter using the proposed double-balanced mixer is experimentally demonstrated in 65-nm CMOS. The transmitter has a maximum output power of -8 dBm. The spectrum measurement shows the capability of transmitting 30-Gbps QPSK signals. This transmitter is the first ever demonstration of transmitters using varactor-based mixer above 100 GHz and supporting such a data rate.